From 97453e2ff09c041c904ed976623d4265fbd79012 Mon Sep 17 00:00:00 2001 From: bp Date: Tue, 14 Jan 2025 10:46:46 +0100 Subject: [PATCH] TMC9660: Update reg app maps and examples Generated by TMC-XML/tools/tmcpycode.py commit 53539c5 via: "tools/tmcpycode.py", "./descriptions/ic/TMC9660.xml", "--outdir", "../PyTrinamic/pytrinamic/ic/TMC9660" "tools/tmcpycode.py", "./descriptions/ic/TMCTR5W_ADC.xml", "--outdir", "../PyTrinamic/pytrinamic/ic/TMC9660" "tools/tmcpycode.py", "./descriptions/ic/TMCTR5W_SYS_CTRL.xml", "--outdir", "../PyTrinamic/pytrinamic/ic/TMC9660" --- .../headless/tmc9660_3ph_eval_min_demo.py | 7 +- .../tmc9660_3ph_eval_min_demo.py | 7 +- pytrinamic/ic/TMC9660/ADCmap.py | 1253 ++------ pytrinamic/ic/TMC9660/MCCmap.py | 2822 ++++++----------- pytrinamic/ic/TMC9660/SYS_CTRLmap.py | 637 +--- 5 files changed, 1279 insertions(+), 3447 deletions(-) diff --git a/examples/evalboards/TMC9660/reg_app/headless/tmc9660_3ph_eval_min_demo.py b/examples/evalboards/TMC9660/reg_app/headless/tmc9660_3ph_eval_min_demo.py index e7cfa2b..6da4615 100644 --- a/examples/evalboards/TMC9660/reg_app/headless/tmc9660_3ph_eval_min_demo.py +++ b/examples/evalboards/TMC9660/reg_app/headless/tmc9660_3ph_eval_min_demo.py @@ -33,10 +33,11 @@ tmc9660 = TMC9660(my_interface) - tmc9660.write(TMC9660.MCC.MOTOR_CONFIG.TYPE.choice["NONE No motor"]) + tmc9660.write(TMC9660.MCC.MOTOR_CONFIG.TYPE.choice.BLDC) tmc9660.write(TMC9660.MCC.MOTOR_CONFIG.N_POLE_PAIRS, 4) for _ in range(20): - print(f"I0 = {tmc9660.read(TMC9660.MCC.ADC_I1_I0_SCALED.ADC_SCALED_I0)}") - print(f"I1 = {tmc9660.read(TMC9660.MCC.ADC_I1_I0_SCALED.ADC_SCALED_I1)}") + print(f"I0 = {tmc9660.read(TMC9660.MCC.ADC_I1_I0_SCALED.I0)}") + print(f"I1 = {tmc9660.read(TMC9660.MCC.ADC_I1_I0_SCALED.I1)}") + print(f"I2 = {tmc9660.read(TMC9660.MCC.ADC_I3_I2_SCALED.I2)}") time.sleep(0.2) diff --git a/examples/evalboards/TMC9660/reg_app/with_landungsbruecke/tmc9660_3ph_eval_min_demo.py b/examples/evalboards/TMC9660/reg_app/with_landungsbruecke/tmc9660_3ph_eval_min_demo.py index 17a3c6e..bbae320 100644 --- a/examples/evalboards/TMC9660/reg_app/with_landungsbruecke/tmc9660_3ph_eval_min_demo.py +++ b/examples/evalboards/TMC9660/reg_app/with_landungsbruecke/tmc9660_3ph_eval_min_demo.py @@ -28,10 +28,11 @@ tmc9660_eval = TMC9660_3PH_eval(my_interface) - tmc9660_eval.write(TMC9660.MCC.MOTOR_CONFIG.TYPE.choice["BLDC Three phase BLDC motor"]) + tmc9660_eval.write(TMC9660.MCC.MOTOR_CONFIG.TYPE.choice.BLDC) tmc9660_eval.write(TMC9660.MCC.MOTOR_CONFIG.N_POLE_PAIRS, 4) for _ in range(20): - print(f"I0 = {tmc9660_eval.read(TMC9660.MCC.ADC_I1_I0_SCALED.ADC_SCALED_I0)}") - print(f"I1 = {tmc9660_eval.read(TMC9660.MCC.ADC_I1_I0_SCALED.ADC_SCALED_I1)}") + print(f"I0 = {tmc9660_eval.read(TMC9660.MCC.ADC_I1_I0_SCALED.I0)}") + print(f"I1 = {tmc9660_eval.read(TMC9660.MCC.ADC_I1_I0_SCALED.I1)}") + print(f"I2 = {tmc9660_eval.read(TMC9660.MCC.ADC_I3_I2_SCALED.I2)}") time.sleep(0.2) diff --git a/pytrinamic/ic/TMC9660/ADCmap.py b/pytrinamic/ic/TMC9660/ADCmap.py index c5f0438..570f28e 100644 --- a/pytrinamic/ic/TMC9660/ADCmap.py +++ b/pytrinamic/ic/TMC9660/ADCmap.py @@ -1,11 +1,11 @@ ################################################################################ -# Copyright © 2024 Analog Devices Inc. All Rights Reserved. +# Copyright © 2025 Analog Devices Inc. All Rights Reserved. # This software is proprietary to Analog Devices, Inc. and its licensors. ################################################################################ # This file was generated. Do not modify it manually! -from pytrinamic.ic import Access, RegisterGroup, Field, Register +from pytrinamic.ic import Access, RegisterGroup, Choice, Field, Register class ADCMap: @@ -14,117 +14,51 @@ def __init__(self, block=None): self.ALL_REGISTERS = _ALL_REGISTERS(block) - - class _ALL_REGISTERS(RegisterGroup): - class _ADC_RW_ADDR_DATA(Register): - - class _REG_ADDR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("REG_ADDR", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _REG_DATA_WR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("REG_DATA_WR", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _RD_STROBE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("RD_STROBE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _WR_STROBE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("WR_STROBE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _RD_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("RD_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _WR_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("WR_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC0_CONFIG_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC0_CONFIG_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC1_CONFIG_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC1_CONFIG_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC2_CONFIG_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC2_CONFIG_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC3_CONFIG_DONE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC3_CONFIG_DONE", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_RW_ADDR_DATA", parent, access, address, block, signed) - self.REG_ADDR = self._REG_ADDR(self, Access.RW, 0x0000003F, 0, signed=False) - self.REG_DATA_WR = self._REG_DATA_WR(self, Access.RW, 0x0000FF00, 8, signed=False) - self.RD_STROBE = self._RD_STROBE(self, Access.RW, 0x00010000, 16, signed=False) - self.WR_STROBE = self._WR_STROBE(self, Access.RW, 0x00020000, 17, signed=False) - self.RD_DONE = self._RD_DONE(self, Access.R, 0x00040000, 18, signed=False) - self.WR_DONE = self._WR_DONE(self, Access.R, 0x00080000, 19, signed=False) - self.ADC0_CONFIG_DONE = self._ADC0_CONFIG_DONE(self, Access.RW, 0x03000000, 24, signed=False) - self.ADC1_CONFIG_DONE = self._ADC1_CONFIG_DONE(self, Access.RW, 0x0C000000, 26, signed=False) - self.ADC2_CONFIG_DONE = self._ADC2_CONFIG_DONE(self, Access.RW, 0x30000000, 28, signed=False) - self.ADC3_CONFIG_DONE = self._ADC3_CONFIG_DONE(self, Access.RW, 0xC0000000, 30, signed=False) - - class _ADC_SRC_CONFIG(Register): + class _SRC_CONFIG(Register): class _ADC0_MUX0_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC0_MUX0_OFF = Choice(0, parent) + self.ADC0_MUX0_1ST = Choice(1, parent) + self.ADC0_MUX0_2ND = Choice(2, parent) + self.ADC0_MUX0_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC0_MUX0_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC0_MUX1_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC0_MUX1_OFF = Choice(0, parent) + self.ADC0_MUX1_1ST = Choice(1, parent) + self.ADC0_MUX1_2ND = Choice(2, parent) + self.ADC0_MUX1_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC0_MUX1_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC0_MUX2_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC0_MUX2_OFF = Choice(0, parent) + self.ADC0_MUX2_1ST = Choice(1, parent) + self.ADC0_MUX2_2ND = Choice(2, parent) + self.ADC0_MUX2_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC0_MUX2_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC0_MUX3_DIS(Field): @@ -142,31 +76,45 @@ def __init__(self, parent, access, mask, shift, signed): class _ADC1_MUX0_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC1_MUX0_OFF = Choice(0, parent) + self.ADC1_MUX0_1ST = Choice(1, parent) + self.ADC1_MUX0_2ND = Choice(2, parent) + self.ADC1_MUX0_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC1_MUX0_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC1_MUX1_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC1_MUX1_OFF = Choice(0, parent) + self.ADC1_MUX1_1ST = Choice(1, parent) + self.ADC1_MUX1_2ND = Choice(2, parent) + self.ADC1_MUX1_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC1_MUX1_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC1_MUX2_CFG(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC1_MUX2_CFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC1_MUX3_DIS(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC1_MUX2_OFF = Choice(0, parent) + self.ADC1_MUX2_1ST = Choice(1, parent) + self.ADC1_MUX2_2ND = Choice(2, parent) + self.ADC1_MUX2_3RD = Choice(3, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC1_MUX3_DIS", parent, access, mask, shift, signed=signed) + super().__init__("ADC1_MUX2_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC1_MUX2_DETOUR(Field): @@ -177,24 +125,45 @@ def __init__(self, parent, access, mask, shift, signed): class _ADC2_MUX0_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC2_MUX0_OFF = Choice(0, parent) + self.ADC2_MUX0_1ST = Choice(1, parent) + self.ADC2_MUX0_2ND = Choice(2, parent) + self.ADC2_MUX0_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC2_MUX0_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC2_MUX1_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC2_MUX1_OFF = Choice(0, parent) + self.ADC2_MUX1_1ST = Choice(1, parent) + self.ADC2_MUX1_2ND = Choice(2, parent) + self.ADC2_MUX1_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC2_MUX1_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC2_MUX2_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC2_MUX2_OFF = Choice(0, parent) + self.ADC2_MUX2_1ST = Choice(1, parent) + self.ADC2_MUX2_2ND = Choice(2, parent) + self.ADC2_MUX2_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC2_MUX2_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC2_MUX3_DIS(Field): @@ -212,31 +181,45 @@ def __init__(self, parent, access, mask, shift, signed): class _ADC3_MUX0_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC3_MUX0_OFF = Choice(0, parent) + self.ADC3_MUX0_1ST = Choice(1, parent) + self.ADC3_MUX0_2ND = Choice(2, parent) + self.ADC3_MUX0_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC3_MUX0_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC3_MUX1_CFG(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC3_MUX1_OFF = Choice(0, parent) + self.ADC3_MUX1_1ST = Choice(1, parent) + self.ADC3_MUX1_2ND = Choice(2, parent) + self.ADC3_MUX1_3RD = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ADC3_MUX1_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC3_MUX2_CFG(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC3_MUX2_CFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC3_MUX3_DIS(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC3_MUX2_OFF = Choice(0, parent) + self.ADC3_MUX2_1ST = Choice(1, parent) + self.ADC3_MUX2_2ND = Choice(2, parent) + self.ADC3_MUX2_3RD = Choice(3, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC3_MUX3_DIS", parent, access, mask, shift, signed=signed) + super().__init__("ADC3_MUX2_CFG", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _ADC3_MUX2_DETOUR(Field): @@ -246,236 +229,59 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_SRC_CONFIG", parent, access, address, block, signed) - self.ADC0_MUX0_CFG = self._ADC0_MUX0_CFG(self, Access.RW, 0x00000003, 0, signed=False) - self.ADC0_MUX1_CFG = self._ADC0_MUX1_CFG(self, Access.RW, 0x0000000C, 2, signed=False) - self.ADC0_MUX2_CFG = self._ADC0_MUX2_CFG(self, Access.RW, 0x00000030, 4, signed=False) - self.ADC0_MUX3_DIS = self._ADC0_MUX3_DIS(self, Access.RW, 0x00000040, 6, signed=False) + super().__init__("SRC_CONFIG", parent, access, address, block, signed) + self.ADC0_MUX0_CFG = self._ADC0_MUX0_CFG( self, Access.RW, 0x00000003, 0, signed=False) + self.ADC0_MUX1_CFG = self._ADC0_MUX1_CFG( self, Access.RW, 0x0000000C, 2, signed=False) + self.ADC0_MUX2_CFG = self._ADC0_MUX2_CFG( self, Access.RW, 0x00000030, 4, signed=False) + self.ADC0_MUX3_DIS = self._ADC0_MUX3_DIS( self, Access.RW, 0x00000040, 6, signed=False) self.ADC0_MUX2_DETOUR = self._ADC0_MUX2_DETOUR(self, Access.RW, 0x00000080, 7, signed=False) - self.ADC1_MUX0_CFG = self._ADC1_MUX0_CFG(self, Access.RW, 0x00000300, 8, signed=False) - self.ADC1_MUX1_CFG = self._ADC1_MUX1_CFG(self, Access.RW, 0x00000C00, 10, signed=False) - self.ADC1_MUX2_CFG = self._ADC1_MUX2_CFG(self, Access.RW, 0x00003000, 12, signed=False) - self.ADC1_MUX3_DIS = self._ADC1_MUX3_DIS(self, Access.RW, 0x00004000, 14, signed=False) + self.ADC1_MUX0_CFG = self._ADC1_MUX0_CFG( self, Access.RW, 0x00000300, 8, signed=False) + self.ADC1_MUX1_CFG = self._ADC1_MUX1_CFG( self, Access.RW, 0x00000C00, 10, signed=False) + self.ADC1_MUX2_CFG = self._ADC1_MUX2_CFG( self, Access.RW, 0x00003000, 12, signed=False) self.ADC1_MUX2_DETOUR = self._ADC1_MUX2_DETOUR(self, Access.RW, 0x00008000, 15, signed=False) - self.ADC2_MUX0_CFG = self._ADC2_MUX0_CFG(self, Access.RW, 0x00030000, 16, signed=False) - self.ADC2_MUX1_CFG = self._ADC2_MUX1_CFG(self, Access.RW, 0x000C0000, 18, signed=False) - self.ADC2_MUX2_CFG = self._ADC2_MUX2_CFG(self, Access.RW, 0x00300000, 20, signed=False) - self.ADC2_MUX3_DIS = self._ADC2_MUX3_DIS(self, Access.RW, 0x00400000, 22, signed=False) + self.ADC2_MUX0_CFG = self._ADC2_MUX0_CFG( self, Access.RW, 0x00030000, 16, signed=False) + self.ADC2_MUX1_CFG = self._ADC2_MUX1_CFG( self, Access.RW, 0x000C0000, 18, signed=False) + self.ADC2_MUX2_CFG = self._ADC2_MUX2_CFG( self, Access.RW, 0x00300000, 20, signed=False) + self.ADC2_MUX3_DIS = self._ADC2_MUX3_DIS( self, Access.RW, 0x00400000, 22, signed=False) self.ADC2_MUX2_DETOUR = self._ADC2_MUX2_DETOUR(self, Access.RW, 0x00800000, 23, signed=False) - self.ADC3_MUX0_CFG = self._ADC3_MUX0_CFG(self, Access.RW, 0x03000000, 24, signed=False) - self.ADC3_MUX1_CFG = self._ADC3_MUX1_CFG(self, Access.RW, 0x0C000000, 26, signed=False) - self.ADC3_MUX2_CFG = self._ADC3_MUX2_CFG(self, Access.RW, 0x30000000, 28, signed=False) - self.ADC3_MUX3_DIS = self._ADC3_MUX3_DIS(self, Access.RW, 0x40000000, 30, signed=False) + self.ADC3_MUX0_CFG = self._ADC3_MUX0_CFG( self, Access.RW, 0x03000000, 24, signed=False) + self.ADC3_MUX1_CFG = self._ADC3_MUX1_CFG( self, Access.RW, 0x0C000000, 26, signed=False) + self.ADC3_MUX2_CFG = self._ADC3_MUX2_CFG( self, Access.RW, 0x30000000, 28, signed=False) self.ADC3_MUX2_DETOUR = self._ADC3_MUX2_DETOUR(self, Access.RW, 0x80000000, 31, signed=False) - class _ADC_SETUP(Register): - - class _SELECT_ADC(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SELECT_ADC", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NRST_ADC_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NRST_ADC_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NRST_ADC_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NRST_ADC_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NRST_ADC_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NRST_ADC_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NRST_ADC_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NRST_ADC_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MUX0_AUTO_CHOP_DISABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MUX0_AUTO_CHOP_DISABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MUX1_CHOP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MUX1_CHOP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MUX2_CHOP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MUX2_CHOP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MUX3_CHOP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MUX3_CHOP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ23CM_CHOP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ23CM_CHOP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ_CHOP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_CHOP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _EXT_ADC_AUTO_PROT(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("EXT_ADC_AUTO_PROT", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MMU_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MMU_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None + class _SETUP(Register): class _ADC_SHIFT_SAMPLE(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_SHIFT_SAMPLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC4_OV_MSKI(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC4_OV_MSKI", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC5_OV_MSKI(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC5_OV_MSKI", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC6_OV_MSKI(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC6_OV_MSKI", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC7_OV_MSKI(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC7_OV_MSKI", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _HALF_WAKEUP_FREQ(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("HALF_WAKEUP_FREQ", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_SETUP", parent, access, address, block, signed) - self.SELECT_ADC = self._SELECT_ADC(self, Access.RW, 0x0000000F, 0, signed=False) - self.NRST_ADC_0 = self._NRST_ADC_0(self, Access.RW, 0x00000010, 4, signed=False) - self.NRST_ADC_1 = self._NRST_ADC_1(self, Access.RW, 0x00000020, 5, signed=False) - self.NRST_ADC_2 = self._NRST_ADC_2(self, Access.RW, 0x00000040, 6, signed=False) - self.NRST_ADC_3 = self._NRST_ADC_3(self, Access.RW, 0x00000080, 7, signed=False) - self.MUX0_AUTO_CHOP_DISABLE = self._MUX0_AUTO_CHOP_DISABLE(self, Access.RW, 0x00000100, 8, signed=False) - self.MUX1_CHOP_ENABLE = self._MUX1_CHOP_ENABLE(self, Access.RW, 0x00000200, 9, signed=False) - self.MUX2_CHOP_ENABLE = self._MUX2_CHOP_ENABLE(self, Access.RW, 0x00000400, 10, signed=False) - self.MUX3_CHOP_ENABLE = self._MUX3_CHOP_ENABLE(self, Access.RW, 0x00000800, 11, signed=False) - self.AZ23CM_CHOP_ENABLE = self._AZ23CM_CHOP_ENABLE(self, Access.RW, 0x00001000, 12, signed=False) - self.AZ_CHOP_ENABLE = self._AZ_CHOP_ENABLE(self, Access.RW, 0x00002000, 13, signed=False) - self.EXT_ADC_AUTO_PROT = self._EXT_ADC_AUTO_PROT(self, Access.RW, 0x00004000, 14, signed=False) - self.MMU_ENABLE = self._MMU_ENABLE(self, Access.RW, 0x00008000, 15, signed=False) - self.ADC_SHIFT_SAMPLE = self._ADC_SHIFT_SAMPLE(self, Access.RW, 0x000F0000, 16, signed=False) - self.ADC4_OV_MSKI = self._ADC4_OV_MSKI(self, Access.RW, 0x00100000, 20, signed=False) - self.ADC5_OV_MSKI = self._ADC5_OV_MSKI(self, Access.RW, 0x00200000, 21, signed=False) - self.ADC6_OV_MSKI = self._ADC6_OV_MSKI(self, Access.RW, 0x00400000, 22, signed=False) - self.ADC7_OV_MSKI = self._ADC7_OV_MSKI(self, Access.RW, 0x00800000, 23, signed=False) - self.HALF_WAKEUP_FREQ = self._HALF_WAKEUP_FREQ(self, Access.RW, 0x01000000, 24, signed=False) - - class _ADC_RD_DATA(Register): - - class _DATA_ADC_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DATA_ADC_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DATA_ADC_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DATA_ADC_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DATA_ADC_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DATA_ADC_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DATA_ADC_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DATA_ADC_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_RD_DATA", parent, access, address, block, signed) - self.DATA_ADC_0 = self._DATA_ADC_0(self, Access.R, 0x000000FF, 0, signed=False) - self.DATA_ADC_1 = self._DATA_ADC_1(self, Access.R, 0x0000FF00, 8, signed=False) - self.DATA_ADC_2 = self._DATA_ADC_2(self, Access.R, 0x00FF0000, 16, signed=False) - self.DATA_ADC_3 = self._DATA_ADC_3(self, Access.R, 0xFF000000, 24, signed=False) - - class _ADC_VERSION(Register): - - class _VERSION_NUMBER(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC_SHIFT_500NS = Choice(0, parent) + self.ADC_SHIFT_600NS = Choice(1, parent) + self.ADC_SHIFT_700NS = Choice(2, parent) + self.ADC_SHIFT_800NS = Choice(3, parent) + self.ADC_SHIFT_900NS = Choice(4, parent) + self.ADC_SHIFT_1000NS = Choice(5, parent) + self.ADC_SHIFT_1100NS = Choice(6, parent) + self.ADC_SHIFT_1200NS = Choice(7, parent) + self.ADC_SHIFT_1300NS = Choice(8, parent) + self.ADC_SHIFT_1400NS = Choice(9, parent) + self.ADC_SHIFT_1500NS = Choice(10, parent) + self.ADC_SHIFT_1600NS = Choice(11, parent) + self.ADC_SHIFT_1700NS = Choice(12, parent) + self.ADC_SHIFT_1800NS = Choice(13, parent) + self.ADC_SHIFT_1900NS = Choice(14, parent) + self.ADC_SHIFT_2000NS = Choice(15, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("VERSION_NUMBER", parent, access, mask, shift, signed=signed) + super().__init__("ADC_SHIFT_SAMPLE", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_VERSION", parent, access, address, block, signed) - self.VERSION_NUMBER = self._VERSION_NUMBER(self, Access.R, 0xFFFFFFFF, 0, signed=False) + super().__init__("SETUP", parent, access, address, block, signed) + self.ADC_SHIFT_SAMPLE = self._ADC_SHIFT_SAMPLE(self, Access.RW, 0x000F0000, 16, signed=False) - class _ADC_STATUS(Register): + class _STATUS(Register): class _RDY_ADC_0(Field): @@ -505,34 +311,6 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None - class _ADC4_OV_FLAG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC4_OV_FLAG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC5_OV_FLAG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC5_OV_FLAG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC6_OV_FLAG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC6_OV_FLAG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _ADC7_OV_FLAG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC7_OV_FLAG", parent, access, mask, shift, signed=signed) - - self.choice = None - class _ADC0_WTCHDG_FAIL(Field): def __init__(self, parent, access, mask, shift, signed): @@ -590,15 +368,11 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_STATUS", parent, access, address, block, signed) - self.RDY_ADC_0 = self._RDY_ADC_0(self, Access.R, 0x00000001, 0, signed=False) - self.RDY_ADC_1 = self._RDY_ADC_1(self, Access.R, 0x00000002, 1, signed=False) - self.RDY_ADC_2 = self._RDY_ADC_2(self, Access.R, 0x00000004, 2, signed=False) - self.RDY_ADC_3 = self._RDY_ADC_3(self, Access.R, 0x00000008, 3, signed=False) - self.ADC4_OV_FLAG = self._ADC4_OV_FLAG(self, Access.R, 0x00000010, 4, signed=False) - self.ADC5_OV_FLAG = self._ADC5_OV_FLAG(self, Access.R, 0x00000020, 5, signed=False) - self.ADC6_OV_FLAG = self._ADC6_OV_FLAG(self, Access.R, 0x00000040, 6, signed=False) - self.ADC7_OV_FLAG = self._ADC7_OV_FLAG(self, Access.R, 0x00000080, 7, signed=False) + super().__init__("STATUS", parent, access, address, block, signed) + self.RDY_ADC_0 = self._RDY_ADC_0( self, Access.R, 0x00000001, 0, signed=False) + self.RDY_ADC_1 = self._RDY_ADC_1( self, Access.R, 0x00000002, 1, signed=False) + self.RDY_ADC_2 = self._RDY_ADC_2( self, Access.R, 0x00000004, 2, signed=False) + self.RDY_ADC_3 = self._RDY_ADC_3( self, Access.R, 0x00000008, 3, signed=False) self.ADC0_WTCHDG_FAIL = self._ADC0_WTCHDG_FAIL(self, Access.R, 0x00000100, 8, signed=False) self.ADC1_WTCHDG_FAIL = self._ADC1_WTCHDG_FAIL(self, Access.R, 0x00000200, 9, signed=False) self.ADC2_WTCHDG_FAIL = self._ADC2_WTCHDG_FAIL(self, Access.R, 0x00000400, 10, signed=False) @@ -608,19 +382,6 @@ def __init__(self, parent, access, address, block, signed): self.ADC2_MUXSEQ_FAIL = self._ADC2_MUXSEQ_FAIL(self, Access.R, 0x00004000, 14, signed=False) self.ADC3_MUXSEQ_FAIL = self._ADC3_MUXSEQ_FAIL(self, Access.R, 0x00008000, 15, signed=False) - class _CSA_AZ_VALS(Register): - - class _CSA_AZ_OFS_VALUES(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CSA_AZ_OFS_VALUES", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA_AZ_VALS", parent, access, address, block, signed) - self.CSA_AZ_OFS_VALUES = self._CSA_AZ_OFS_VALUES(self, Access.R, 0xFFFFFFFF, 0, signed=False) - class _CSA_SETUP(Register): class _CSA0_EN(Field): @@ -653,10 +414,17 @@ def __init__(self, parent, access, mask, shift, signed): class _CSA012_GAIN(Field): + class _Choices: + def __init__(self, parent) -> None: + self.csa012_gain_x5 = Choice(0, parent) + self.csa012_gain_x10 = Choice(1, parent) + self.csa012_gain_x20 = Choice(2, parent) + self.csa012_gain_x40 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("CSA012_GAIN", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _CSA012_BYPASS(Field): @@ -667,10 +435,17 @@ def __init__(self, parent, access, mask, shift, signed): class _CSA3_GAIN(Field): + class _Choices: + def __init__(self, parent) -> None: + self.csa3_gain_x5 = Choice(0, parent) + self.csa3_gain_x10 = Choice(1, parent) + self.csa3_gain_x20 = Choice(2, parent) + self.csa3_gain_x40 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("CSA3_GAIN", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _CSA3_BYPASS(Field): @@ -681,691 +456,63 @@ def __init__(self, parent, access, mask, shift, signed): class _CSA012_FILT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.csa012_filt_0u55 = Choice(0, parent) + self.csa012_filt_0u75 = Choice(1, parent) + self.csa012_filt_1u00 = Choice(2, parent) + self.csa012_filt_1u35 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("CSA012_FILT", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _CSA3_FILT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.csa3_filt_0u55 = Choice(0, parent) + self.csa3_filt_0u75 = Choice(1, parent) + self.csa3_filt_1u00 = Choice(2, parent) + self.csa3_filt_1u35 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("CSA3_FILT", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _CSA_AZ_FLTLNGTH_EXP(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CSA_AZ_FLTLNGTH_EXP", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CSA_SLCT_AZ_VALS(Field): + class _Choices: + def __init__(self, parent) -> None: + self.csa_az_filt_off = Choice(0, parent) + self.csa_az_filt_2 = Choice(1, parent) + self.csa_az_filt_4 = Choice(2, parent) + self.csa_az_filt_8 = Choice(3, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("CSA_SLCT_AZ_VALS", parent, access, mask, shift, signed=signed) + super().__init__("CSA_AZ_FLTLNGTH_EXP", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) - class _AZ_SLCT_AZ_VALS(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_SLCT_AZ_VALS", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CSA_AZ_TIME(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CSA_AZ_TIME", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CSA_ADC_TRIG_BLK(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CSA_ADC_TRIG_BLK", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA_SETUP", parent, access, address, block, signed) - self.CSA0_EN = self._CSA0_EN(self, Access.RW, 0x00000001, 0, signed=False) - self.CSA1_EN = self._CSA1_EN(self, Access.RW, 0x00000002, 1, signed=False) - self.CSA2_EN = self._CSA2_EN(self, Access.RW, 0x00000004, 2, signed=False) - self.CSA3_EN = self._CSA3_EN(self, Access.RW, 0x00000008, 3, signed=False) - self.CSA012_GAIN = self._CSA012_GAIN(self, Access.RW, 0x00000030, 4, signed=False) - self.CSA012_BYPASS = self._CSA012_BYPASS(self, Access.RW, 0x00000040, 6, signed=False) - self.CSA3_GAIN = self._CSA3_GAIN(self, Access.RW, 0x00000300, 8, signed=False) - self.CSA3_BYPASS = self._CSA3_BYPASS(self, Access.RW, 0x00000400, 10, signed=False) - self.CSA012_FILT = self._CSA012_FILT(self, Access.RW, 0x00003000, 12, signed=False) - self.CSA3_FILT = self._CSA3_FILT(self, Access.RW, 0x0000C000, 14, signed=False) - self.CSA_AZ_FLTLNGTH_EXP = self._CSA_AZ_FLTLNGTH_EXP(self, Access.RW, 0x000F0000, 16, signed=False) - self.CSA_SLCT_AZ_VALS = self._CSA_SLCT_AZ_VALS(self, Access.RW, 0x00300000, 20, signed=False) - self.AZ_SLCT_AZ_VALS = self._AZ_SLCT_AZ_VALS(self, Access.RW, 0x00C00000, 22, signed=False) - self.CSA_AZ_TIME = self._CSA_AZ_TIME(self, Access.RW, 0x07000000, 24, signed=False) - self.CSA_ADC_TRIG_BLK = self._CSA_ADC_TRIG_BLK(self, Access.RW, 0x70000000, 28, signed=False) - - class _CSA0_CONFIG(Register): - - class _OFSL0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY_FRC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY_FRC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_CMR0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_CMR0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFS0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFS0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSCSA_EN0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSCSA_EN0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSADC_EN0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSADC_EN0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ2_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ2_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ3_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ3_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZCM_0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZCM_0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CALIB_EN0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CALIB_EN0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NVALID0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NVALID0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _TRIG0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("TRIG0", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA0_CONFIG", parent, access, address, block, signed) - self.OFSL0 = self._OFSL0(self, Access.RW, 0x0000003F, 0, signed=False) - self.OFSM0 = self._OFSM0(self, Access.RW, 0x00000FC0, 6, signed=False) - self.OFSH0 = self._OFSH0(self, Access.RW, 0x0003F000, 12, signed=False) - self.OFS_READY0 = self._OFS_READY0(self, Access.R, 0x00040000, 18, signed=False) - self.OFS_READY_FRC0 = self._OFS_READY_FRC0(self, Access.RW, 0x00080000, 19, signed=False) - self.SKIP_CMR0 = self._SKIP_CMR0(self, Access.RW, 0x00100000, 20, signed=False) - self.SKIP_OFS0 = self._SKIP_OFS0(self, Access.RW, 0x00200000, 21, signed=False) - self.OFSCSA_EN0 = self._OFSCSA_EN0(self, Access.RW, 0x00400000, 22, signed=False) - self.OFSADC_EN0 = self._OFSADC_EN0(self, Access.RW, 0x00800000, 23, signed=False) - self.AZ_0 = self._AZ_0(self, Access.RW, 0x01000000, 24, signed=False) - self.AZ2_0 = self._AZ2_0(self, Access.RW, 0x02000000, 25, signed=False) - self.AZ3_0 = self._AZ3_0(self, Access.RW, 0x04000000, 26, signed=False) - self.AZCM_0 = self._AZCM_0(self, Access.RW, 0x08000000, 27, signed=False) - self.CALIB_EN0 = self._CALIB_EN0(self, Access.RW, 0x10000000, 28, signed=False) - self.NVALID0 = self._NVALID0(self, Access.R, 0x40000000, 30, signed=False) - self.TRIG0 = self._TRIG0(self, Access.RW, 0x80000000, 31, signed=False) - - class _CSA1_CONFIG(Register): - - class _OFSL1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY_FRC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY_FRC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_CMR1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_CMR1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFS1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFS1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSCSA_EN1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSCSA_EN1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSADC_EN1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSADC_EN1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ2_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ2_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ3_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ3_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZCM_1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZCM_1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CALIB_EN1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CALIB_EN1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NVALID1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NVALID1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _TRIG1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("TRIG1", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA1_CONFIG", parent, access, address, block, signed) - self.OFSL1 = self._OFSL1(self, Access.RW, 0x0000003F, 0, signed=False) - self.OFSM1 = self._OFSM1(self, Access.RW, 0x00000FC0, 6, signed=False) - self.OFSH1 = self._OFSH1(self, Access.RW, 0x0003F000, 12, signed=False) - self.OFS_READY1 = self._OFS_READY1(self, Access.R, 0x00040000, 18, signed=False) - self.OFS_READY_FRC1 = self._OFS_READY_FRC1(self, Access.RW, 0x00080000, 19, signed=False) - self.SKIP_CMR1 = self._SKIP_CMR1(self, Access.RW, 0x00100000, 20, signed=False) - self.SKIP_OFS1 = self._SKIP_OFS1(self, Access.RW, 0x00200000, 21, signed=False) - self.OFSCSA_EN1 = self._OFSCSA_EN1(self, Access.RW, 0x00400000, 22, signed=False) - self.OFSADC_EN1 = self._OFSADC_EN1(self, Access.RW, 0x00800000, 23, signed=False) - self.AZ_1 = self._AZ_1(self, Access.RW, 0x01000000, 24, signed=False) - self.AZ2_1 = self._AZ2_1(self, Access.RW, 0x02000000, 25, signed=False) - self.AZ3_1 = self._AZ3_1(self, Access.RW, 0x04000000, 26, signed=False) - self.AZCM_1 = self._AZCM_1(self, Access.RW, 0x08000000, 27, signed=False) - self.CALIB_EN1 = self._CALIB_EN1(self, Access.RW, 0x10000000, 28, signed=False) - self.NVALID1 = self._NVALID1(self, Access.R, 0x40000000, 30, signed=False) - self.TRIG1 = self._TRIG1(self, Access.RW, 0x80000000, 31, signed=False) - - class _CSA2_CONFIG(Register): - - class _OFSL2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY_FRC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY_FRC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_CMR2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_CMR2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFS2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFS2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSCSA_EN2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSCSA_EN2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSADC_EN2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSADC_EN2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ2_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ2_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ3_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ3_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZCM_2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZCM_2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CALIB_EN2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CALIB_EN2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NVALID2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NVALID2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _TRIG2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("TRIG2", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA2_CONFIG", parent, access, address, block, signed) - self.OFSL2 = self._OFSL2(self, Access.RW, 0x0000003F, 0, signed=False) - self.OFSM2 = self._OFSM2(self, Access.RW, 0x00000FC0, 6, signed=False) - self.OFSH2 = self._OFSH2(self, Access.RW, 0x0003F000, 12, signed=False) - self.OFS_READY2 = self._OFS_READY2(self, Access.R, 0x00040000, 18, signed=False) - self.OFS_READY_FRC2 = self._OFS_READY_FRC2(self, Access.RW, 0x00080000, 19, signed=False) - self.SKIP_CMR2 = self._SKIP_CMR2(self, Access.RW, 0x00100000, 20, signed=False) - self.SKIP_OFS2 = self._SKIP_OFS2(self, Access.RW, 0x00200000, 21, signed=False) - self.OFSCSA_EN2 = self._OFSCSA_EN2(self, Access.RW, 0x00400000, 22, signed=False) - self.OFSADC_EN2 = self._OFSADC_EN2(self, Access.RW, 0x00800000, 23, signed=False) - self.AZ_2 = self._AZ_2(self, Access.RW, 0x01000000, 24, signed=False) - self.AZ2_2 = self._AZ2_2(self, Access.RW, 0x02000000, 25, signed=False) - self.AZ3_2 = self._AZ3_2(self, Access.RW, 0x04000000, 26, signed=False) - self.AZCM_2 = self._AZCM_2(self, Access.RW, 0x08000000, 27, signed=False) - self.CALIB_EN2 = self._CALIB_EN2(self, Access.RW, 0x10000000, 28, signed=False) - self.NVALID2 = self._NVALID2(self, Access.R, 0x40000000, 30, signed=False) - self.TRIG2 = self._TRIG2(self, Access.RW, 0x80000000, 31, signed=False) - - class _CSA3_CONFIG(Register): - - class _OFSL3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFS_READY_FRC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFS_READY_FRC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_CMR3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_CMR3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFS3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFS3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSCSA_EN3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSCSA_EN3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSADC_EN3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSADC_EN3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ2_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ2_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZ3_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZ3_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _AZCM_3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("AZCM_3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CALIB_EN3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CALIB_EN3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _NVALID3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("NVALID3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _TRIG3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("TRIG3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA3_CONFIG", parent, access, address, block, signed) - self.OFSL3 = self._OFSL3(self, Access.RW, 0x0000003F, 0, signed=False) - self.OFSM3 = self._OFSM3(self, Access.RW, 0x00000FC0, 6, signed=False) - self.OFSH3 = self._OFSH3(self, Access.RW, 0x0003F000, 12, signed=False) - self.OFS_READY3 = self._OFS_READY3(self, Access.R, 0x00040000, 18, signed=False) - self.OFS_READY_FRC3 = self._OFS_READY_FRC3(self, Access.RW, 0x00080000, 19, signed=False) - self.SKIP_CMR3 = self._SKIP_CMR3(self, Access.RW, 0x00100000, 20, signed=False) - self.SKIP_OFS3 = self._SKIP_OFS3(self, Access.RW, 0x00200000, 21, signed=False) - self.OFSCSA_EN3 = self._OFSCSA_EN3(self, Access.RW, 0x00400000, 22, signed=False) - self.OFSADC_EN3 = self._OFSADC_EN3(self, Access.RW, 0x00800000, 23, signed=False) - self.AZ_3 = self._AZ_3(self, Access.RW, 0x01000000, 24, signed=False) - self.AZ2_3 = self._AZ2_3(self, Access.RW, 0x02000000, 25, signed=False) - self.AZ3_3 = self._AZ3_3(self, Access.RW, 0x04000000, 26, signed=False) - self.AZCM_3 = self._AZCM_3(self, Access.RW, 0x08000000, 27, signed=False) - self.CALIB_EN3 = self._CALIB_EN3(self, Access.RW, 0x10000000, 28, signed=False) - self.NVALID3 = self._NVALID3(self, Access.R, 0x40000000, 30, signed=False) - self.TRIG3 = self._TRIG3(self, Access.RW, 0x80000000, 31, signed=False) - - class _CSA1_0_CMR_CFG(Register): - - class _CMRN_DAC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRN_DAC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA1_0_CMR_CFG", parent, access, address, block, signed) - self.CMRN_DAC0 = self._CMRN_DAC0(self, Access.RW, 0x000000FF, 0, signed=False) - self.CMRP_DAC0 = self._CMRP_DAC0(self, Access.RW, 0x0000FF00, 8, signed=False) - self.CMRN_DAC1 = self._CMRN_DAC1(self, Access.RW, 0x00FF0000, 16, signed=False) - self.CMRP_DAC1 = self._CMRP_DAC1(self, Access.RW, 0xFF000000, 24, signed=False) - - class _CSA3_2_CMR_CFG(Register): - - class _CMRN_DAC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRN_DAC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("CSA3_2_CMR_CFG", parent, access, address, block, signed) - self.CMRN_DAC2 = self._CMRN_DAC2(self, Access.RW, 0x000000FF, 0, signed=False) - self.CMRP_DAC2 = self._CMRP_DAC2(self, Access.RW, 0x0000FF00, 8, signed=False) - self.CMRN_DAC3 = self._CMRN_DAC3(self, Access.RW, 0x00FF0000, 16, signed=False) - self.CMRP_DAC3 = self._CMRP_DAC3(self, Access.RW, 0xFF000000, 24, signed=False) + def __init__(self, parent, access, address, block, signed): + super().__init__("CSA_SETUP", parent, access, address, block, signed) + self.CSA0_EN = self._CSA0_EN( self, Access.RW, 0x00000001, 0, signed=False) + self.CSA1_EN = self._CSA1_EN( self, Access.RW, 0x00000002, 1, signed=False) + self.CSA2_EN = self._CSA2_EN( self, Access.RW, 0x00000004, 2, signed=False) + self.CSA3_EN = self._CSA3_EN( self, Access.RW, 0x00000008, 3, signed=False) + self.CSA012_GAIN = self._CSA012_GAIN( self, Access.RW, 0x00000030, 4, signed=False) + self.CSA012_BYPASS = self._CSA012_BYPASS( self, Access.RW, 0x00000040, 6, signed=False) + self.CSA3_GAIN = self._CSA3_GAIN( self, Access.RW, 0x00000300, 8, signed=False) + self.CSA3_BYPASS = self._CSA3_BYPASS( self, Access.RW, 0x00000400, 10, signed=False) + self.CSA012_FILT = self._CSA012_FILT( self, Access.RW, 0x00003000, 12, signed=False) + self.CSA3_FILT = self._CSA3_FILT( self, Access.RW, 0x0000C000, 14, signed=False) + self.CSA_AZ_FLTLNGTH_EXP = self._CSA_AZ_FLTLNGTH_EXP(self, Access.RW, 0x000F0000, 16, signed=False) def __init__(self, block=None): super().__init__("ALL_REGISTERS", block) - self.ADC_RW_ADDR_DATA = self._ADC_RW_ADDR_DATA(self, Access.RW, 0x0000, block, False) - self.ADC_SRC_CONFIG = self._ADC_SRC_CONFIG(self, Access.RW, 0x0001, block, False) - self.ADC_SETUP = self._ADC_SETUP(self, Access.RW, 0x0002, block, False) - self.ADC_RD_DATA = self._ADC_RD_DATA(self, Access.R, 0x0003, block, False) - self.ADC_VERSION = self._ADC_VERSION(self, Access.R, 0x0004, block, False) - self.ADC_STATUS = self._ADC_STATUS(self, Access.R, 0x0005, block, False) - self.CSA_AZ_VALS = self._CSA_AZ_VALS(self, Access.R, 0x0006, block, False) - self.CSA_SETUP = self._CSA_SETUP(self, Access.RW, 0x0007, block, False) - self.CSA0_CONFIG = self._CSA0_CONFIG(self, Access.RW, 0x0008, block, False) - self.CSA1_CONFIG = self._CSA1_CONFIG(self, Access.RW, 0x0009, block, False) - self.CSA2_CONFIG = self._CSA2_CONFIG(self, Access.RW, 0x000A, block, False) - self.CSA3_CONFIG = self._CSA3_CONFIG(self, Access.RW, 0x000B, block, False) - self.CSA1_0_CMR_CFG = self._CSA1_0_CMR_CFG(self, Access.RW, 0x000C, block, False) - self.CSA3_2_CMR_CFG = self._CSA3_2_CMR_CFG(self, Access.RW, 0x000D, block, False) - + self.SRC_CONFIG = self._SRC_CONFIG(self, Access.RW, 0x0001, block, False) + self.SETUP = self._SETUP( self, Access.RW, 0x0002, block, False) + self.STATUS = self._STATUS( self, Access.R, 0x0005, block, False) + self.CSA_SETUP = self._CSA_SETUP( self, Access.RW, 0x0007, block, False) diff --git a/pytrinamic/ic/TMC9660/MCCmap.py b/pytrinamic/ic/TMC9660/MCCmap.py index 9f8003f..7c9685a 100644 --- a/pytrinamic/ic/TMC9660/MCCmap.py +++ b/pytrinamic/ic/TMC9660/MCCmap.py @@ -1,12 +1,10 @@ ################################################################################ -# Copyright © 2024 Analog Devices Inc. All Rights Reserved. +# Copyright © 2025 Analog Devices Inc. All Rights Reserved. # This software is proprietary to Analog Devices, Inc. and its licensors. ################################################################################ # This file was generated. Do not modify it manually! -from typing import TypedDict - from pytrinamic.ic import Access, RegisterGroup, Choice, Field, Register @@ -16,497 +14,6 @@ def __init__(self, block=None): self.ALL_REGISTERS = _ALL_REGISTERS(block) -_UX1_SELECT_FIELD_CHOICES = TypedDict("_UX1_SELECT_FIELD_CHOICES", { - "ADC_I0 ADC_I0": Choice, - "ADC_I1 ADC_I1": Choice, - "ADC_I2 ADC_I2": Choice, - "ADC_I3 ADC_I3": Choice, -}) - - -_VX2_SELECT_FIELD_CHOICES = TypedDict("_VX2_SELECT_FIELD_CHOICES", { - "ADC_I0 ADC_I0": Choice, - "ADC_I1 ADC_I1": Choice, - "ADC_I2 ADC_I2": Choice, - "ADC_I3 ADC_I3": Choice, -}) - - -_WY1_SELECT_FIELD_CHOICES = TypedDict("_WY1_SELECT_FIELD_CHOICES", { - "ADC_I0 ADC_I0": Choice, - "ADC_I1 ADC_I1": Choice, - "ADC_I2 ADC_I2": Choice, - "ADC_I3 ADC_I3": Choice, -}) - - -_Y2_SELECT_FIELD_CHOICES = TypedDict("_Y2_SELECT_FIELD_CHOICES", { - "ADC_I0 ADC_I0": Choice, - "ADC_I1 ADC_I1": Choice, - "ADC_I2 ADC_I2": Choice, - "ADC_I3 ADC_I3": Choice, -}) - - -_MEASUREMENT_MODE_FIELD_CHOICES = TypedDict("_MEASUREMENT_MODE_FIELD_CHOICES", { - "Inline 3 channel BLDC/2 channel Stepper Inline Shunt Measurement": Choice, - "VW 2 channels with I_V and I_WY measured (BLDC)": Choice, - "UW 2 channels with I_UX and I_WY measured (BLDC)": Choice, - "UV 2 channels with I_UX and I_V measured (BLDC)": Choice, - "bottom 3/4 phase bottom shunt with automatic switching (BLDC and Stepper)": Choice, -}) - - -_TYPE_FIELD_CHOICES = TypedDict("_TYPE_FIELD_CHOICES", { - "NONE No motor": Choice, - "DC Single phase DC motor": Choice, - "STEPPER Two phase Stepper motor": Choice, - "BLDC Three phase BLDC motor": Choice, -}) - - -_MOTION_MODE_FIELD_CHOICES = TypedDict("_MOTION_MODE_FIELD_CHOICES", { - "STOPPED stopped mode": Choice, - "TORQUE torque mode": Choice, - "VELOCITY velocity mode": Choice, - "POSITION position mode": Choice, - "PRBS_FLUX prbs flux mode": Choice, - "PRBS_TORQUE prbs torque mode": Choice, - "PRBS_VELOCITY prbs velocity mode": Choice, - "PRBS_POSITION prbs position mode": Choice, - "VOLTAGE_EXT voltage ext mode": Choice, - "PRBS_UD prbs ud mode": Choice, - "PWM_EXT pwm ext mode": Choice, -}) - - -_PHI_E_SELECTION_FIELD_CHOICES = TypedDict("_PHI_E_SELECTION_FIELD_CHOICES", { - "RESERVED reserved": Choice, - "PHI_E_EXT phi_e_ext": Choice, - "PHI_E_RAMP phi_e_ramp": Choice, - "PHI_E_ABN phi_e_abn": Choice, - "RAMP_X_ACTUAL ramp_X_actual": Choice, - "PHI_E_HAL phi_e_hal": Choice, -}) - - -_CHOP_FIELD_CHOICES = TypedDict("_CHOP_FIELD_CHOICES", { - "OFF_FREE PWM off, free running": Choice, - "OFF_LSON PWM off, Low Side (LS) permanently on": Choice, - "OFF_HSON PWM off, High Side (HS) permanent on": Choice, - "OFF_FREE2 PWM off, free running": Choice, - "OFF_FREE3 PWM off, free running": Choice, - "LSPWM_HSOFF Low side (LS) PWM, high side (HS) off": Choice, - "HSPWM_LSOFF High side (HS) PWM, low side (LS) off": Choice, - "CENTERED Centered PWM for FOC": Choice, -}) - - -_SV_MODE_FIELD_CHOICES = TypedDict("_SV_MODE_FIELD_CHOICES", { - "DISABLED Space Vector PWM disabled": Choice, - "HARMONIC Third Harmonic Injection enabled": Choice, - "BOTTOM Flat Bottom Modulation": Choice, - "BOTTOM_OFFSET Flat BottomModulation with Offset": Choice, -}) - - -_Y2_HS_SRC_FIELD_CHOICES = TypedDict("_Y2_HS_SRC_FIELD_CHOICES", { - "Y2_HS Y2_HS": Choice, - "Y2_ALT Y2_ALT": Choice, - "TIM_BASIC TIM_BASIC": Choice, -}) - - -_ORDER_FIELD_CHOICES = TypedDict("_ORDER_FIELD_CHOICES", { - "UVW Hall Signal Order U/V/W": Choice, - "VWU Hall Signal Order V/W/U": Choice, - "WUV Hall Signal Order W/U/V": Choice, - "RESERVED reserved": Choice, - "UWV Hall Signal Order U/W/V": Choice, - "VUW Hall Signal Order V/U/W": Choice, - "WVU Hall Signal Order W/V/U": Choice, - "RESERVED2 reserved": Choice, -}) - - -_SELECTION_FIELD_CHOICES = TypedDict("_SELECTION_FIELD_CHOICES", { - "phi_e phi_e selected via PHI_E_SELECTION": Choice, - "phi_e_ext phi_e_ext": Choice, - "phi_e_ramp phi_e_ramp": Choice, - "phi_e_abn phi_e_abn": Choice, - "ramp_X_actual ramp_X_actual": Choice, - "phi_e_hal phi_e_hal (Don't use 0x0 with extrapolated Hall)": Choice, - "phi_m_ext phi_m_ext": Choice, - "abn_count abn_count": Choice, - "phi_m_abn phi_m_abn": Choice, - "hall_count hall_count": Choice, -}) - - -_MOVING_AVRG_FILTER_SAMPLES_FIELD_CHOICES = TypedDict("_MOVING_AVRG_FILTER_SAMPLES_FIELD_CHOICES", { - "1 No additional filter": Choice, - "2 Average over 2 samples": Choice, - "3 Average over 3 samples": Choice, - "4 Average over 4 samples": Choice, - "5 Average over 5 samples": Choice, - "6 Average over 6 samples": Choice, - "7 Average over 7 samples": Choice, - "8 Average over 8 samples": Choice, -}) - - -_START_SELECT_FIELD_CHOICES = TypedDict("_START_SELECT_FIELD_CHOICES", { - "PWM_CENTER center pulse of pwm": Choice, - "PWM_ZERO zero pulse of pwm": Choice, - "PWM_LS raw pwm ls generator output": Choice, - "PWM_HS raw pwm hs generator output": Choice, - "GDRV_LS_ON gdrv ls output signal": Choice, - "GDRV_HS_ON gdrv hs output signal": Choice, - "OCP_LS_CMP raw ls ocp comperator out": Choice, - "OCP_HS_CMP raw hs ocp comperator out": Choice, - "VGS_LS_ON raw ls vgs on out": Choice, - "VGS_HS_ON raw hs vgs on out": Choice, - "VGS_LS_OFF raw ls vgs off out": Choice, - "VGS_HS_OFF raw hs vgs off out": Choice, - "PHASE_HIGH phase voltage greater than 0.9VM": Choice, - "PHASE_LOW phase voltage less than 0.1VM": Choice, -}) - - -_END_SELECT_FIELD_CHOICES = TypedDict("_END_SELECT_FIELD_CHOICES", { - "PWM_CENTER center pulse of pwm": Choice, - "PWM_ZERO zero pulse of pwm": Choice, - "PWM_LS raw pwm ls generator output": Choice, - "PWM_HS raw pwm hs generator output": Choice, - "GDRV_LS_ON gdrv ls output signal": Choice, - "GDRV_HS_ON gdrv hs output signal": Choice, - "OCP_LS_CMP raw ls ocp comperator out": Choice, - "OCP_HS_CMP raw hs ocp comperator out": Choice, - "VGS_LS_ON raw ls vgs on out": Choice, - "VGS_HS_ON raw hs vgs on out": Choice, - "VGS_LS_OFF raw ls vgs off out": Choice, - "VGS_HS_OFF raw hs vgs off out": Choice, - "PHASE_HIGH phase voltage greater than 0.9VM": Choice, - "PHASE_LOW phase voltage less than 0.1VM": Choice, -}) - - -_PHASE_DIV_GAIN_FIELD_CHOICES = TypedDict("_PHASE_DIV_GAIN_FIELD_CHOICES", { - "PHDIV_80 div80": Choice, - "PHDIV_40 div40": Choice, - "PHDIV_20 div20": Choice, - "PHDIV_10 div10": Choice, -}) - - -_IGATE_SINK_UVW_FIELD_CHOICES = TypedDict("_IGATE_SINK_UVW_FIELD_CHOICES", { - "SINK_40MA 40 mA": Choice, - "SINK_80MA 80 mA": Choice, - "SINK_160MA 160 mA": Choice, - "SINK_240MA 240 mA": Choice, - "SINK_320MA 320 mA": Choice, - "SINK_400MA 400 mA": Choice, - "SINK_480MA 480 mA": Choice, - "SINK_560MA 560 mA": Choice, - "SINK_640MA 640 mA": Choice, - "SINK_800MA 800 mA": Choice, - "SINK_960MA 960 mA": Choice, - "SINK_1120MA 1120 mA": Choice, - "SINK_1280MA 1280 mA": Choice, - "SINK_1600MA 1600 mA": Choice, - "SINK_1920MA 1920 mA": Choice, - "SINK_2000MA 2000 mA": Choice, -}) - - -_IGATE_SOURCE_UVW_FIELD_CHOICES = TypedDict("_IGATE_SOURCE_UVW_FIELD_CHOICES", { - "SOURCE_20MA 20 mA": Choice, - "SOURCE_40MA 40 mA": Choice, - "SOURCE_80MA 80 mA": Choice, - "SOURCE_120MA 120 mA": Choice, - "SOURCE_160MA 160 mA": Choice, - "SOURCE_200MA 200 mA": Choice, - "SOURCE_240MA 240 mA": Choice, - "SOURCE_280MA 280mA": Choice, - "SOURCE_320MA 320 mA": Choice, - "SOURCE_400MA 400 mA": Choice, - "SOURCE_480MA 480 mA": Choice, - "SOURCE_560MA 560 mA": Choice, - "SOURCE_640MA 640 mA": Choice, - "SOURCE_800MA 800 mA": Choice, - "SOURCE_960MA 960 mA": Choice, - "SOURCE_1000MA 1000mA": Choice, -}) - - -_IGATE_SINK_Y2_FIELD_CHOICES = TypedDict("_IGATE_SINK_Y2_FIELD_CHOICES", { - "SINK_40MA 40 mA": Choice, - "SINK_80MA 80 mA": Choice, - "SINK_160MA 160 mA": Choice, - "SINK_240MA 240 mA": Choice, - "SINK_320MA 320 mA": Choice, - "SINK_400MA 400 mA": Choice, - "SINK_480MA 480 mA": Choice, - "SINK_560MA 560 mA": Choice, - "SINK_640MA 640 mA": Choice, - "SINK_800MA 800 mA": Choice, - "SINK_960MA 960 mA": Choice, - "SINK_1120MA 1120 mA": Choice, - "SINK_1280MA 1280 mA": Choice, - "SINK_1600MA 1600 mA": Choice, - "SINK_1920MA 1920 mA": Choice, - "SINK_2000MA 2000 mA": Choice, -}) - - -_IGATE_SOURCE_Y2_FIELD_CHOICES = TypedDict("_IGATE_SOURCE_Y2_FIELD_CHOICES", { - "SOURCE_20MA 20 mA": Choice, - "SOURCE_40MA 40 mA": Choice, - "SOURCE_80MA 80 mA": Choice, - "SOURCE_120MA 120 mA": Choice, - "SOURCE_160MA 160 mA": Choice, - "SOURCE_200MA 200 mA": Choice, - "SOURCE_240MA 240 mA": Choice, - "SOURCE_280MA 280mA": Choice, - "SOURCE_320MA 320 mA": Choice, - "SOURCE_400MA 400 mA": Choice, - "SOURCE_480MA 480 mA": Choice, - "SOURCE_560MA 560 mA": Choice, - "SOURCE_640MA 640 mA": Choice, - "SOURCE_800MA 800 mA": Choice, - "SOURCE_960MA 960 mA": Choice, - "SOURCE_1000MA 1000mA": Choice, -}) - - -_VS_UVLO_LVL_FIELD_CHOICES = TypedDict("_VS_UVLO_LVL_FIELD_CHOICES", { - "VSUVLO_44 4.4V": Choice, - "VSUVLO_46 4.6V": Choice, - "VSUVLO_48 4.8V": Choice, - "VSUVLO_50 5.0V": Choice, - "VSUVLO_52 5.2V": Choice, - "VSUVLO_54 5.4V": Choice, - "VSUVLO_56 5.6V": Choice, - "VSUVLO_58 5.8V": Choice, - "VSUVLO_60 6.0V": Choice, - "VSUVLO_63 6.3V": Choice, - "VSUVLO_66 6.6V": Choice, - "VSUVLO_69 6.9V": Choice, - "VSUVLO_72 7.2V": Choice, - "VSUVLO_75 7.5V": Choice, - "VSUVLO_78 7.8V": Choice, - "VSUVLO_81 8.1V": Choice, -}) - - -_VGS_DEGLITCH_UVW_FIELD_CHOICES = TypedDict("_VGS_DEGLITCH_UVW_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_VGS_BLANKING_UVW_FIELD_CHOICES = TypedDict("_VGS_BLANKING_UVW_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, -}) - - -_VGS_DEGLITCH_Y2_FIELD_CHOICES = TypedDict("_VGS_DEGLITCH_Y2_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_VGS_BLANKING_Y2_FIELD_CHOICES = TypedDict("_VGS_BLANKING_Y2_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, -}) - - -_LS_RETRIES_UVW_FIELD_CHOICES = TypedDict("_LS_RETRIES_UVW_FIELD_CHOICES", { - "OFF No Retries": Choice, - "ONE 1 Retry": Choice, - "TWO 2 Retries": Choice, - "THREE 3 Retries": Choice, -}) - - -_HS_RETRIES_UVW_FIELD_CHOICES = TypedDict("_HS_RETRIES_UVW_FIELD_CHOICES", { - "OFF No Retries": Choice, - "ONE 1 Retry": Choice, - "TWO 2 Retries": Choice, - "THREE 3 Retries": Choice, -}) - - -_LS_RETRIES_Y2_FIELD_CHOICES = TypedDict("_LS_RETRIES_Y2_FIELD_CHOICES", { - "OFF No Retries": Choice, - "ONE 1 Retry": Choice, - "TWO 2 Retries": Choice, - "THREE 3 Retries": Choice, -}) - - -_HS_RETRIES_Y2_FIELD_CHOICES = TypedDict("_HS_RETRIES_Y2_FIELD_CHOICES", { - "OFF No Retries": Choice, - "ONE 1 Retry": Choice, - "TWO 2 Retries": Choice, - "THREE 3 Retries": Choice, -}) - - -_LS_OCP_DEGLITCH_UVW_FIELD_CHOICES = TypedDict("_LS_OCP_DEGLITCH_UVW_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_LS_OCP_BLANKING_UVW_FIELD_CHOICES = TypedDict("_LS_OCP_BLANKING_UVW_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, - "BLK_2000NS 2us": Choice, - "BLK_4000NS 4us": Choice, - "BLK_6000NS 6us": Choice, - "BLK_8000NS 8us": Choice, -}) - - -_LS_OCP_THRES_UVW_FIELD_CHOICES = TypedDict("_LS_OCP_THRES_UVW_FIELD_CHOICES", { - "82mv 63mv": Choice, - "166mv 125mv": Choice, - "248mv 187mv": Choice, - "330mv 248mv": Choice, - "414mv 312mv": Choice, - "498mv 374mv": Choice, - "582mv 434mv": Choice, - "660mv 504mv": Choice, - "123mv 705mv": Choice, - "249mv 940mv": Choice, - "372mv 1180mv": Choice, - "495mv 1410mv": Choice, - "621mv 1650mv": Choice, - "747mv 1880mv": Choice, - "873mv 2110mv": Choice, - "990mv 2350mv": Choice, -}) - - -_HS_OCP_DEGLITCH_UVW_FIELD_CHOICES = TypedDict("_HS_OCP_DEGLITCH_UVW_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_HS_OCP_BLANKING_UVW_FIELD_CHOICES = TypedDict("_HS_OCP_BLANKING_UVW_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, - "BLK_2000NS 2us": Choice, - "BLK_4000NS 4us": Choice, - "BLK_6000NS 6us": Choice, - "BLK_8000NS 8us": Choice, -}) - - -_LS_OCP_DEGLITCH_Y2_FIELD_CHOICES = TypedDict("_LS_OCP_DEGLITCH_Y2_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_LS_OCP_BLANKING_Y2_FIELD_CHOICES = TypedDict("_LS_OCP_BLANKING_Y2_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, - "BLK_2000NS 2us": Choice, - "BLK_4000NS 4us": Choice, - "BLK_6000NS 6us": Choice, - "BLK_8000NS 8us": Choice, -}) - - -_LS_OCP_THRES_Y2_FIELD_CHOICES = TypedDict("_LS_OCP_THRES_Y2_FIELD_CHOICES", { - "82mv 63mv": Choice, - "166mv 125mv": Choice, - "248mv 187mv": Choice, - "330mv 248mv": Choice, - "414mv 312mv": Choice, - "498mv 374mv": Choice, - "582mv 434mv": Choice, - "660mv 504mv": Choice, - "123mv 705mv": Choice, - "249mv 940mv": Choice, - "372mv 1180mv": Choice, - "495mv 1410mv": Choice, - "621mv 1650mv": Choice, - "747mv 1880mv": Choice, - "873mv 2110mv": Choice, - "990mv 2350mv": Choice, -}) - - -_HS_OCP_DEGLITCH_Y2_FIELD_CHOICES = TypedDict("_HS_OCP_DEGLITCH_Y2_FIELD_CHOICES", { - "DEG_OFF off": Choice, - "DEG_250NS 0.25us": Choice, - "DEG_500NS 0.5us": Choice, - "DEG_1000NS 1us": Choice, - "DEG_2000NS 2us": Choice, - "DEG_4000NS 4us": Choice, - "DEG_6000NS 6us": Choice, - "DEG_8000NS 8us": Choice, -}) - - -_HS_OCP_BLANKING_Y2_FIELD_CHOICES = TypedDict("_HS_OCP_BLANKING_Y2_FIELD_CHOICES", { - "BLK_OFF off": Choice, - "BLK_250NS 0.25us": Choice, - "BLK_500NS 0.5us": Choice, - "BLK_1000NS 1us": Choice, - "BLK_2000NS 2us": Choice, - "BLK_4000NS 4us": Choice, - "BLK_6000NS 6us": Choice, - "BLK_8000NS 8us": Choice, -}) - - class _ALL_REGISTERS(RegisterGroup): class _INFO_CHIP(Register): @@ -527,7 +34,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("INFO_CHIP", parent, access, address, block, signed) - self.ID = self._ID(self, Access.R, 0x0000FFFF, 0, signed=False) + self.ID = self._ID( self, Access.R, 0x0000FFFF, 0, signed=False) self.PREFIX = self._PREFIX(self, Access.R, 0xFFFF0000, 16, signed=False) class _INFO_VARIANT(Register): @@ -546,18 +53,10 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None - class _ENABLE_JTAG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ENABLE_JTAG", parent, access, mask, shift, signed=signed) - - self.choice = None - def __init__(self, parent, access, address, block, signed): super().__init__("INFO_VARIANT", parent, access, address, block, signed) - self.PMU_VAR = self._PMU_VAR(self, Access.R, 0x00000003, 0, signed=False) - self.GDRV_VAR = self._GDRV_VAR(self, Access.R, 0x0000000C, 2, signed=False) - self.ENABLE_JTAG = self._ENABLE_JTAG(self, Access.R, 0x80000000, 31, signed=False) + self.PMU_VAR = self._PMU_VAR( self, Access.R, 0x00000003, 0, signed=False) + self.GDRV_VAR = self._GDRV_VAR(self, Access.R, 0x0000000C, 2, signed=False) class _INFO_REVISION(Register): @@ -568,167 +67,114 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None - class _IS_FPGA(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("IS_FPGA", parent, access, mask, shift, signed=signed) - - self.choice = None - def __init__(self, parent, access, address, block, signed): super().__init__("INFO_REVISION", parent, access, address, block, signed) - self.REVISION = self._REVISION(self, Access.R, 0x7FFFFFFF, 0, signed=False) - self.IS_FPGA = self._IS_FPGA(self, Access.R, 0x80000000, 31, signed=False) - - class _INFO_DATE(Register): - - class _MINUTE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MINUTE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _HOUR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("HOUR", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DAY(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DAY", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MONTH(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MONTH", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _YEAR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("YEAR", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("INFO_DATE", parent, access, address, block, signed) - self.MINUTE = self._MINUTE(self, Access.R, 0x0000003F, 0, signed=False) - self.HOUR = self._HOUR(self, Access.R, 0x000007C0, 6, signed=False) - self.DAY = self._DAY(self, Access.R, 0x0000F800, 11, signed=False) - self.MONTH = self._MONTH(self, Access.R, 0x000F0000, 16, signed=False) - self.YEAR = self._YEAR(self, Access.R, 0xFFF00000, 20, signed=False) + self.REVISION = self._REVISION(self, Access.R, 0x7FFFFFFF, 0, signed=False) class _ADC_I1_I0_RAW(Register): - class _ADC_RAW_I0(Field): + class _I0(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_I0", parent, access, mask, shift, signed=signed) + super().__init__("I0", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_RAW_I1(Field): + class _I1(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_I1", parent, access, mask, shift, signed=signed) + super().__init__("I1", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I1_I0_RAW", parent, access, address, block, signed) - self.ADC_RAW_I0 = self._ADC_RAW_I0(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_RAW_I1 = self._ADC_RAW_I1(self, Access.R, 0xFFFF0000, 16, signed=True) + self.I0 = self._I0(self, Access.R, 0x0000FFFF, 0, signed=True) + self.I1 = self._I1(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_I3_I2_RAW(Register): - class _ADC_RAW_I2(Field): + class _I2(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_I2", parent, access, mask, shift, signed=signed) + super().__init__("I2", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_RAW_I3(Field): + class _I3(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_I3", parent, access, mask, shift, signed=signed) + super().__init__("I3", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I3_I2_RAW", parent, access, address, block, signed) - self.ADC_RAW_I2 = self._ADC_RAW_I2(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_RAW_I3 = self._ADC_RAW_I3(self, Access.R, 0xFFFF0000, 16, signed=True) + self.I2 = self._I2(self, Access.R, 0x0000FFFF, 0, signed=True) + self.I3 = self._I3(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_U1_U0_RAW(Register): - class _ADC_RAW_U0(Field): + class _U0(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_U0", parent, access, mask, shift, signed=signed) + super().__init__("U0", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_RAW_U1(Field): + class _U1(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_U1", parent, access, mask, shift, signed=signed) + super().__init__("U1", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_U1_U0_RAW", parent, access, address, block, signed) - self.ADC_RAW_U0 = self._ADC_RAW_U0(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_RAW_U1 = self._ADC_RAW_U1(self, Access.R, 0xFFFF0000, 16, signed=True) + self.U0 = self._U0(self, Access.R, 0x0000FFFF, 0, signed=True) + self.U1 = self._U1(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_U3_U2_RAW(Register): - class _ADC_RAW_U2(Field): + class _U2(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_U2", parent, access, mask, shift, signed=signed) + super().__init__("U2", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_RAW_U3(Field): + class _U3(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_U3", parent, access, mask, shift, signed=signed) + super().__init__("U3", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_U3_U2_RAW", parent, access, address, block, signed) - self.ADC_RAW_U2 = self._ADC_RAW_U2(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_RAW_U3 = self._ADC_RAW_U3(self, Access.R, 0xFFFF0000, 16, signed=True) + self.U2 = self._U2(self, Access.R, 0x0000FFFF, 0, signed=True) + self.U3 = self._U3(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_TEMP_VM_RAW(Register): - class _ADC_RAW_VM(Field): + class _VM(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_VM", parent, access, mask, shift, signed=signed) + super().__init__("VM", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_RAW_TEMP(Field): + class _TEMP(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_RAW_TEMP", parent, access, mask, shift, signed=signed) + super().__init__("TEMP", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_TEMP_VM_RAW", parent, access, address, block, signed) - self.ADC_RAW_VM = self._ADC_RAW_VM(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_RAW_TEMP = self._ADC_RAW_TEMP(self, Access.R, 0xFFFF0000, 16, signed=True) + self.VM = self._VM( self, Access.R, 0x0000FFFF, 0, signed=True) + self.TEMP = self._TEMP(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_AIN1_AIN0_RAW(Register): @@ -776,71 +222,74 @@ class _ADC_I_GEN_CONFIG(Register): class _UX1_SELECT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC_I0 = Choice(0, parent) + self.ADC_I1 = Choice(1, parent) + self.ADC_I2 = Choice(2, parent) + self.ADC_I3 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("UX1_SELECT", parent, access, mask, shift, signed=signed) - self.choice : _UX1_SELECT_FIELD_CHOICES = { - "ADC_I0 ADC_I0": Choice(0, self), - "ADC_I1 ADC_I1": Choice(1, self), - "ADC_I2 ADC_I2": Choice(2, self), - "ADC_I3 ADC_I3": Choice(3, self), - } + self.choice = self._Choices(self) class _VX2_SELECT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC_I0 = Choice(0, parent) + self.ADC_I1 = Choice(1, parent) + self.ADC_I2 = Choice(2, parent) + self.ADC_I3 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VX2_SELECT", parent, access, mask, shift, signed=signed) - self.choice : _VX2_SELECT_FIELD_CHOICES = { - "ADC_I0 ADC_I0": Choice(0, self), - "ADC_I1 ADC_I1": Choice(1, self), - "ADC_I2 ADC_I2": Choice(2, self), - "ADC_I3 ADC_I3": Choice(3, self), - } + self.choice = self._Choices(self) class _WY1_SELECT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC_I0 = Choice(0, parent) + self.ADC_I1 = Choice(1, parent) + self.ADC_I2 = Choice(2, parent) + self.ADC_I3 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("WY1_SELECT", parent, access, mask, shift, signed=signed) - self.choice : _WY1_SELECT_FIELD_CHOICES = { - "ADC_I0 ADC_I0": Choice(0, self), - "ADC_I1 ADC_I1": Choice(1, self), - "ADC_I2 ADC_I2": Choice(2, self), - "ADC_I3 ADC_I3": Choice(3, self), - } + self.choice = self._Choices(self) class _Y2_SELECT(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("Y2_SELECT", parent, access, mask, shift, signed=signed) - - self.choice : _Y2_SELECT_FIELD_CHOICES = { - "ADC_I0 ADC_I0": Choice(0, self), - "ADC_I1 ADC_I1": Choice(1, self), - "ADC_I2 ADC_I2": Choice(2, self), - "ADC_I3 ADC_I3": Choice(3, self), - } - - class _SOURCE_SELECT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.ADC_I0 = Choice(0, parent) + self.ADC_I1 = Choice(1, parent) + self.ADC_I2 = Choice(2, parent) + self.ADC_I3 = Choice(3, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("SOURCE_SELECT", parent, access, mask, shift, signed=signed) + super().__init__("Y2_SELECT", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _MEASUREMENT_MODE(Field): + class _Choices: + def __init__(self, parent) -> None: + self.INLINE = Choice(0, parent) + self.INLINE_VW = Choice(1, parent) + self.INLINE_UW = Choice(2, parent) + self.INLINE_UV = Choice(3, parent) + self.BOTTOM = Choice(4, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("MEASUREMENT_MODE", parent, access, mask, shift, signed=signed) - self.choice : _MEASUREMENT_MODE_FIELD_CHOICES = { - "Inline 3 channel BLDC/2 channel Stepper Inline Shunt Measurement": Choice(0, self), - "VW 2 channels with I_V and I_WY measured (BLDC)": Choice(1, self), - "UW 2 channels with I_UX and I_WY measured (BLDC)": Choice(2, self), - "UV 2 channels with I_UX and I_V measured (BLDC)": Choice(3, self), - "bottom 3/4 phase bottom shunt with automatic switching (BLDC and Stepper)": Choice(4, self), - } + self.choice = self._Choices(self) class _TRIGGER_SELECT(Field): @@ -858,14 +307,13 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I_GEN_CONFIG", parent, access, address, block, signed) - self.UX1_SELECT = self._UX1_SELECT(self, Access.RW, 0x00000003, 0, signed=False) - self.VX2_SELECT = self._VX2_SELECT(self, Access.RW, 0x0000000C, 2, signed=False) - self.WY1_SELECT = self._WY1_SELECT(self, Access.RW, 0x00000030, 4, signed=False) - self.Y2_SELECT = self._Y2_SELECT(self, Access.RW, 0x000000C0, 6, signed=False) - self.SOURCE_SELECT = self._SOURCE_SELECT(self, Access.RW, 0x00000100, 8, signed=False) + self.UX1_SELECT = self._UX1_SELECT( self, Access.RW, 0x00000003, 0, signed=False) + self.VX2_SELECT = self._VX2_SELECT( self, Access.RW, 0x0000000C, 2, signed=False) + self.WY1_SELECT = self._WY1_SELECT( self, Access.RW, 0x00000030, 4, signed=False) + self.Y2_SELECT = self._Y2_SELECT( self, Access.RW, 0x000000C0, 6, signed=False) self.MEASUREMENT_MODE = self._MEASUREMENT_MODE(self, Access.RW, 0x00000E00, 9, signed=False) - self.TRIGGER_SELECT = self._TRIGGER_SELECT(self, Access.RW, 0x00001000, 12, signed=False) - self.TRIGGER_POS = self._TRIGGER_POS(self, Access.RW, 0xFFFF0000, 16, signed=False) + self.TRIGGER_SELECT = self._TRIGGER_SELECT( self, Access.RW, 0x00001000, 12, signed=False) + self.TRIGGER_POS = self._TRIGGER_POS( self, Access.RW, 0xFFFF0000, 16, signed=False) class _ADC_I0_CONFIG(Register): @@ -886,7 +334,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I0_CONFIG", parent, access, address, block, signed) self.OFFSET = self._OFFSET(self, Access.RW, 0x0000FFFF, 0, signed=True) - self.SCALE = self._SCALE(self, Access.RW, 0xFFFF0000, 16, signed=True) + self.SCALE = self._SCALE( self, Access.RW, 0xFFFF0000, 16, signed=True) class _ADC_I1_CONFIG(Register): @@ -907,7 +355,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I1_CONFIG", parent, access, address, block, signed) self.OFFSET = self._OFFSET(self, Access.RW, 0x0000FFFF, 0, signed=True) - self.SCALE = self._SCALE(self, Access.RW, 0xFFFF0000, 16, signed=True) + self.SCALE = self._SCALE( self, Access.RW, 0xFFFF0000, 16, signed=True) class _ADC_I2_CONFIG(Register): @@ -928,7 +376,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I2_CONFIG", parent, access, address, block, signed) self.OFFSET = self._OFFSET(self, Access.RW, 0x0000FFFF, 0, signed=True) - self.SCALE = self._SCALE(self, Access.RW, 0xFFFF0000, 16, signed=True) + self.SCALE = self._SCALE( self, Access.RW, 0xFFFF0000, 16, signed=True) class _ADC_I3_CONFIG(Register): @@ -949,83 +397,83 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I3_CONFIG", parent, access, address, block, signed) self.OFFSET = self._OFFSET(self, Access.RW, 0x0000FFFF, 0, signed=True) - self.SCALE = self._SCALE(self, Access.RW, 0xFFFF0000, 16, signed=True) + self.SCALE = self._SCALE( self, Access.RW, 0xFFFF0000, 16, signed=True) class _ADC_I1_I0_SCALED(Register): - class _ADC_SCALED_I0(Field): + class _I0(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_SCALED_I0", parent, access, mask, shift, signed=signed) + super().__init__("I0", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_SCALED_I1(Field): + class _I1(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_SCALED_I1", parent, access, mask, shift, signed=signed) + super().__init__("I1", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I1_I0_SCALED", parent, access, address, block, signed) - self.ADC_SCALED_I0 = self._ADC_SCALED_I0(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_SCALED_I1 = self._ADC_SCALED_I1(self, Access.R, 0xFFFF0000, 16, signed=True) + self.I0 = self._I0(self, Access.R, 0x0000FFFF, 0, signed=True) + self.I1 = self._I1(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_I3_I2_SCALED(Register): - class _ADC_SCALED_I2(Field): + class _I2(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_SCALED_I2", parent, access, mask, shift, signed=signed) + super().__init__("I2", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_SCALED_I3(Field): + class _I3(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_SCALED_I3", parent, access, mask, shift, signed=signed) + super().__init__("I3", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_I3_I2_SCALED", parent, access, address, block, signed) - self.ADC_SCALED_I2 = self._ADC_SCALED_I2(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_SCALED_I3 = self._ADC_SCALED_I3(self, Access.R, 0xFFFF0000, 16, signed=True) + self.I2 = self._I2(self, Access.R, 0x0000FFFF, 0, signed=True) + self.I3 = self._I3(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_IWY_IUX(Register): - class _ADC_IUX(Field): + class _IUX(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_IUX", parent, access, mask, shift, signed=signed) + super().__init__("IUX", parent, access, mask, shift, signed=signed) self.choice = None - class _ADC_IWY(Field): + class _IWY(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_IWY", parent, access, mask, shift, signed=signed) + super().__init__("IWY", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_IWY_IUX", parent, access, address, block, signed) - self.ADC_IUX = self._ADC_IUX(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ADC_IWY = self._ADC_IWY(self, Access.R, 0xFFFF0000, 16, signed=True) + self.IUX = self._IUX(self, Access.R, 0x0000FFFF, 0, signed=True) + self.IWY = self._IWY(self, Access.R, 0xFFFF0000, 16, signed=True) class _ADC_IV(Register): - class _ADC_IV(Field): + class _IV(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ADC_IV", parent, access, mask, shift, signed=signed) + super().__init__("IV", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ADC_IV", parent, access, address, block, signed) - self.ADC_IV = self._ADC_IV(self, Access.R, 0x0000FFFF, 0, signed=True) + self.IV = self._IV(self, Access.R, 0x0000FFFF, 0, signed=True) class _ADC_STATUS(Register): @@ -1227,34 +675,34 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ADC_STATUS", parent, access, address, block, signed) - self.I0_CLIPPED = self._I0_CLIPPED(self, Access.RWC, 0x00000001, 0, signed=False) - self.I1_CLIPPED = self._I1_CLIPPED(self, Access.RWC, 0x00000002, 1, signed=False) - self.I2_CLIPPED = self._I2_CLIPPED(self, Access.RWC, 0x00000004, 2, signed=False) - self.I3_CLIPPED = self._I3_CLIPPED(self, Access.RWC, 0x00000008, 3, signed=False) - self.U0_CLIPPED = self._U0_CLIPPED(self, Access.RWC, 0x00000010, 4, signed=False) - self.U1_CLIPPED = self._U1_CLIPPED(self, Access.RWC, 0x00000020, 5, signed=False) - self.U2_CLIPPED = self._U2_CLIPPED(self, Access.RWC, 0x00000040, 6, signed=False) - self.U3_CLIPPED = self._U3_CLIPPED(self, Access.RWC, 0x00000080, 7, signed=False) + self.I0_CLIPPED = self._I0_CLIPPED( self, Access.RWC, 0x00000001, 0, signed=False) + self.I1_CLIPPED = self._I1_CLIPPED( self, Access.RWC, 0x00000002, 1, signed=False) + self.I2_CLIPPED = self._I2_CLIPPED( self, Access.RWC, 0x00000004, 2, signed=False) + self.I3_CLIPPED = self._I3_CLIPPED( self, Access.RWC, 0x00000008, 3, signed=False) + self.U0_CLIPPED = self._U0_CLIPPED( self, Access.RWC, 0x00000010, 4, signed=False) + self.U1_CLIPPED = self._U1_CLIPPED( self, Access.RWC, 0x00000020, 5, signed=False) + self.U2_CLIPPED = self._U2_CLIPPED( self, Access.RWC, 0x00000040, 6, signed=False) + self.U3_CLIPPED = self._U3_CLIPPED( self, Access.RWC, 0x00000080, 7, signed=False) self.AIN0_CLIPPED = self._AIN0_CLIPPED(self, Access.RWC, 0x00000100, 8, signed=False) self.AIN1_CLIPPED = self._AIN1_CLIPPED(self, Access.RWC, 0x00000200, 9, signed=False) self.AIN2_CLIPPED = self._AIN2_CLIPPED(self, Access.RWC, 0x00000400, 10, signed=False) self.AIN3_CLIPPED = self._AIN3_CLIPPED(self, Access.RWC, 0x00000800, 11, signed=False) - self.VM_CLIPPED = self._VM_CLIPPED(self, Access.RWC, 0x00001000, 12, signed=False) + self.VM_CLIPPED = self._VM_CLIPPED( self, Access.RWC, 0x00001000, 12, signed=False) self.TEMP_CLIPPED = self._TEMP_CLIPPED(self, Access.RWC, 0x00002000, 13, signed=False) - self.I0_DONE = self._I0_DONE(self, Access.RWC, 0x00010000, 16, signed=False) - self.I1_DONE = self._I1_DONE(self, Access.RWC, 0x00020000, 17, signed=False) - self.I2_DONE = self._I2_DONE(self, Access.RWC, 0x00040000, 18, signed=False) - self.I3_DONE = self._I3_DONE(self, Access.RWC, 0x00080000, 19, signed=False) - self.U0_DONE = self._U0_DONE(self, Access.RWC, 0x00100000, 20, signed=False) - self.U1_DONE = self._U1_DONE(self, Access.RWC, 0x00200000, 21, signed=False) - self.U2_DONE = self._U2_DONE(self, Access.RWC, 0x00400000, 22, signed=False) - self.U3_DONE = self._U3_DONE(self, Access.RWC, 0x00800000, 23, signed=False) - self.AIN0_DONE = self._AIN0_DONE(self, Access.RWC, 0x01000000, 24, signed=False) - self.AIN1_DONE = self._AIN1_DONE(self, Access.RWC, 0x02000000, 25, signed=False) - self.AIN2_DONE = self._AIN2_DONE(self, Access.RWC, 0x04000000, 26, signed=False) - self.AIN3_DONE = self._AIN3_DONE(self, Access.RWC, 0x08000000, 27, signed=False) - self.VM_DONE = self._VM_DONE(self, Access.RWC, 0x10000000, 28, signed=False) - self.TEMP_DONE = self._TEMP_DONE(self, Access.RWC, 0x20000000, 29, signed=False) + self.I0_DONE = self._I0_DONE( self, Access.RWC, 0x00010000, 16, signed=False) + self.I1_DONE = self._I1_DONE( self, Access.RWC, 0x00020000, 17, signed=False) + self.I2_DONE = self._I2_DONE( self, Access.RWC, 0x00040000, 18, signed=False) + self.I3_DONE = self._I3_DONE( self, Access.RWC, 0x00080000, 19, signed=False) + self.U0_DONE = self._U0_DONE( self, Access.RWC, 0x00100000, 20, signed=False) + self.U1_DONE = self._U1_DONE( self, Access.RWC, 0x00200000, 21, signed=False) + self.U2_DONE = self._U2_DONE( self, Access.RWC, 0x00400000, 22, signed=False) + self.U3_DONE = self._U3_DONE( self, Access.RWC, 0x00800000, 23, signed=False) + self.AIN0_DONE = self._AIN0_DONE( self, Access.RWC, 0x01000000, 24, signed=False) + self.AIN1_DONE = self._AIN1_DONE( self, Access.RWC, 0x02000000, 25, signed=False) + self.AIN2_DONE = self._AIN2_DONE( self, Access.RWC, 0x04000000, 26, signed=False) + self.AIN3_DONE = self._AIN3_DONE( self, Access.RWC, 0x08000000, 27, signed=False) + self.VM_DONE = self._VM_DONE( self, Access.RWC, 0x10000000, 28, signed=False) + self.TEMP_DONE = self._TEMP_DONE( self, Access.RWC, 0x20000000, 29, signed=False) class _MOTOR_CONFIG(Register): @@ -1267,41 +715,44 @@ def __init__(self, parent, access, mask, shift, signed): class _TYPE(Field): + class _Choices: + def __init__(self, parent) -> None: + self.NONE = Choice(0, parent) + self.DC = Choice(1, parent) + self.STEPPER = Choice(2, parent) + self.BLDC = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("TYPE", parent, access, mask, shift, signed=signed) - self.choice : _TYPE_FIELD_CHOICES = { - "NONE No motor": Choice(0, self), - "DC Single phase DC motor": Choice(1, self), - "STEPPER Two phase Stepper motor": Choice(2, self), - "BLDC Three phase BLDC motor": Choice(3, self), - } + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("MOTOR_CONFIG", parent, access, address, block, signed) self.N_POLE_PAIRS = self._N_POLE_PAIRS(self, Access.RW, 0x0000007F, 0, signed=False) - self.TYPE = self._TYPE(self, Access.RW, 0x00030000, 16, signed=False) + self.TYPE = self._TYPE( self, Access.RW, 0x00030000, 16, signed=False) class _MOTION_CONFIG(Register): class _MOTION_MODE(Field): + class _Choices: + def __init__(self, parent) -> None: + self.STOPPED = Choice(0, parent) + self.TORQUE = Choice(1, parent) + self.VELOCITY = Choice(2, parent) + self.POSITION = Choice(3, parent) + self.PRBS_FLUX = Choice(4, parent) + self.PRBS_TORQUE = Choice(5, parent) + self.PRBS_VELOCITY = Choice(6, parent) + self.PRBS_POSITION = Choice(7, parent) + self.VOLTAGE_EXT = Choice(8, parent) + self.PRBS_UD = Choice(9, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("MOTION_MODE", parent, access, mask, shift, signed=signed) - self.choice : _MOTION_MODE_FIELD_CHOICES = { - "STOPPED stopped mode": Choice(0, self), - "TORQUE torque mode": Choice(1, self), - "VELOCITY velocity mode": Choice(2, self), - "POSITION position mode": Choice(3, self), - "PRBS_FLUX prbs flux mode": Choice(4, self), - "PRBS_TORQUE prbs torque mode": Choice(5, self), - "PRBS_VELOCITY prbs velocity mode": Choice(6, self), - "PRBS_POSITION prbs position mode": Choice(7, self), - "VOLTAGE_EXT voltage ext mode": Choice(8, self), - "PRBS_UD prbs ud mode": Choice(9, self), - "PWM_EXT pwm ext mode": Choice(10, self), - } + self.choice = self._Choices(self) class _RAMP_ENABLE(Field): @@ -1319,33 +770,42 @@ def __init__(self, parent, access, mask, shift, signed): class _FEEDFORWARD(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DISABLED = Choice(0, parent) + self.MCC_RAMPER_V_ACTUAL = Choice(1, parent) + self.MCC_RAMPER_A_ACTUAL = Choice(2, parent) + self.BOTH = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("FEEDFORWARD", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("MOTION_CONFIG", parent, access, address, block, signed) self.MOTION_MODE = self._MOTION_MODE(self, Access.RW, 0x0000000F, 0, signed=False) self.RAMP_ENABLE = self._RAMP_ENABLE(self, Access.RW, 0x00000010, 4, signed=False) - self.RAMP_MODE = self._RAMP_MODE(self, Access.RW, 0x00000020, 5, signed=False) + self.RAMP_MODE = self._RAMP_MODE( self, Access.RW, 0x00000020, 5, signed=False) self.FEEDFORWARD = self._FEEDFORWARD(self, Access.RW, 0x000000C0, 6, signed=False) class _PHI_E_SELECTION(Register): class _PHI_E_SELECTION(Field): + class _Choices: + def __init__(self, parent) -> None: + self.RESERVED = Choice(0, parent) + self.PHI_E_EXT = Choice(1, parent) + self.PHI_E_RAMP = Choice(2, parent) + self.PHI_E_ABN = Choice(3, parent) + self.RAMP_X_ACTUAL = Choice(4, parent) + self.PHI_E_HAL = Choice(5, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("PHI_E_SELECTION", parent, access, mask, shift, signed=signed) - self.choice : _PHI_E_SELECTION_FIELD_CHOICES = { - "RESERVED reserved": Choice(0, self), - "PHI_E_EXT phi_e_ext": Choice(1, self), - "PHI_E_RAMP phi_e_ramp": Choice(2, self), - "PHI_E_ABN phi_e_abn": Choice(3, self), - "RAMP_X_ACTUAL ramp_X_actual": Choice(4, self), - "PHI_E_HAL phi_e_hal": Choice(5, self), - } + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("PHI_E_SELECTION", parent, access, address, block, signed) @@ -1368,42 +828,48 @@ class _PWM_CONFIG(Register): class _CHOP(Field): + class _Choices: + def __init__(self, parent) -> None: + self.OFF_FREE = Choice(0, parent) + self.OFF_LSON = Choice(1, parent) + self.OFF_HSON = Choice(2, parent) + self.OFF_FREE2 = Choice(3, parent) + self.OFF_FREE3 = Choice(4, parent) + self.LSPWM_HSOFF = Choice(5, parent) + self.HSPWM_LSOFF = Choice(6, parent) + self.CENTERED = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("CHOP", parent, access, mask, shift, signed=signed) - self.choice : _CHOP_FIELD_CHOICES = { - "OFF_FREE PWM off, free running": Choice(0, self), - "OFF_LSON PWM off, Low Side (LS) permanently on": Choice(1, self), - "OFF_HSON PWM off, High Side (HS) permanent on": Choice(2, self), - "OFF_FREE2 PWM off, free running": Choice(3, self), - "OFF_FREE3 PWM off, free running": Choice(4, self), - "LSPWM_HSOFF Low side (LS) PWM, high side (HS) off": Choice(5, self), - "HSPWM_LSOFF High side (HS) PWM, low side (LS) off": Choice(6, self), - "CENTERED Centered PWM for FOC": Choice(7, self), - } + self.choice = self._Choices(self) class _SV_MODE(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DISABLED = Choice(0, parent) + self.HARMONIC = Choice(1, parent) + self.BOTTOM = Choice(2, parent) + self.BOTTOM_OFFSET = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("SV_MODE", parent, access, mask, shift, signed=signed) - self.choice : _SV_MODE_FIELD_CHOICES = { - "DISABLED Space Vector PWM disabled": Choice(0, self), - "HARMONIC Third Harmonic Injection enabled": Choice(1, self), - "BOTTOM Flat Bottom Modulation": Choice(2, self), - "BOTTOM_OFFSET Flat BottomModulation with Offset": Choice(3, self), - } + self.choice = self._Choices(self) class _Y2_HS_SRC(Field): + class _Choices: + def __init__(self, parent) -> None: + self.Y2_HS = Choice(0, parent) + self.Y2_ALT = Choice(1, parent) + self.TIM_BASIC = Choice(2, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("Y2_HS_SRC", parent, access, mask, shift, signed=signed) - self.choice : _Y2_HS_SRC_FIELD_CHOICES = { - "Y2_HS Y2_HS": Choice(0, self), - "Y2_ALT Y2_ALT": Choice(1, self), - "TIM_BASIC TIM_BASIC": Choice(2, self), - } + self.choice = self._Choices(self) class _ENABLE_UX1(Field): @@ -1470,17 +936,17 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PWM_CONFIG", parent, access, address, block, signed) - self.CHOP = self._CHOP(self, Access.RW, 0x00000007, 0, signed=False) - self.SV_MODE = self._SV_MODE(self, Access.RW, 0x00000030, 4, signed=False) - self.Y2_HS_SRC = self._Y2_HS_SRC(self, Access.RW, 0x000000C0, 6, signed=False) - self.ENABLE_UX1 = self._ENABLE_UX1(self, Access.RW, 0x00000100, 8, signed=False) - self.ENABLE_VX2 = self._ENABLE_VX2(self, Access.RW, 0x00000200, 9, signed=False) - self.ENABLE_WY1 = self._ENABLE_WY1(self, Access.RW, 0x00000400, 10, signed=False) - self.ENABLE_Y2 = self._ENABLE_Y2(self, Access.RW, 0x00000800, 11, signed=False) - self.EXT_ENABLE_UX1 = self._EXT_ENABLE_UX1(self, Access.RW, 0x00001000, 12, signed=False) - self.EXT_ENABLE_VX2 = self._EXT_ENABLE_VX2(self, Access.RW, 0x00002000, 13, signed=False) - self.EXT_ENABLE_WY1 = self._EXT_ENABLE_WY1(self, Access.RW, 0x00004000, 14, signed=False) - self.EXT_ENABLE_Y2 = self._EXT_ENABLE_Y2(self, Access.RW, 0x00008000, 15, signed=False) + self.CHOP = self._CHOP( self, Access.RW, 0x00000007, 0, signed=False) + self.SV_MODE = self._SV_MODE( self, Access.RW, 0x00000030, 4, signed=False) + self.Y2_HS_SRC = self._Y2_HS_SRC( self, Access.RW, 0x000000C0, 6, signed=False) + self.ENABLE_UX1 = self._ENABLE_UX1( self, Access.RW, 0x00000100, 8, signed=False) + self.ENABLE_VX2 = self._ENABLE_VX2( self, Access.RW, 0x00000200, 9, signed=False) + self.ENABLE_WY1 = self._ENABLE_WY1( self, Access.RW, 0x00000400, 10, signed=False) + self.ENABLE_Y2 = self._ENABLE_Y2( self, Access.RW, 0x00000800, 11, signed=False) + self.EXT_ENABLE_UX1 = self._EXT_ENABLE_UX1( self, Access.RW, 0x00001000, 12, signed=False) + self.EXT_ENABLE_VX2 = self._EXT_ENABLE_VX2( self, Access.RW, 0x00002000, 13, signed=False) + self.EXT_ENABLE_WY1 = self._EXT_ENABLE_WY1( self, Access.RW, 0x00004000, 14, signed=False) + self.EXT_ENABLE_Y2 = self._EXT_ENABLE_Y2( self, Access.RW, 0x00008000, 15, signed=False) self.DUTY_CYCLE_OFFSET = self._DUTY_CYCLE_OFFSET(self, Access.RW, 0xFFFF0000, 16, signed=False) class _PWM_MAXCNT(Register): @@ -1509,55 +975,26 @@ def __init__(self, parent, access, address, block, signed): super().__init__("PWM_SWITCH_LIMIT", parent, access, address, block, signed) self.PWM_SWITCH_LIMIT = self._PWM_SWITCH_LIMIT(self, Access.RW, 0x0000FFFF, 0, signed=False) - class _PWM_WATCHDOG_CFG(Register): - - class _ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DIV2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DIV2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _TRIGGER(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("TRIGGER", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("PWM_WATCHDOG_CFG", parent, access, address, block, signed) - self.ENABLE = self._ENABLE(self, Access.RW, 0x00000001, 0, signed=False) - self.DIV2 = self._DIV2(self, Access.RW, 0x00000002, 1, signed=False) - self.TRIGGER = self._TRIGGER(self, Access.RW, 0x00000004, 2, signed=False) - class _ABN_PHI_E_PHI_M(Register): - class _ABN_PHI_M(Field): + class _PHI_M(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ABN_PHI_M", parent, access, mask, shift, signed=signed) + super().__init__("PHI_M", parent, access, mask, shift, signed=signed) self.choice = None - class _ABN_PHI_E(Field): + class _PHI_E(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ABN_PHI_E", parent, access, mask, shift, signed=signed) + super().__init__("PHI_E", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("ABN_PHI_E_PHI_M", parent, access, address, block, signed) - self.ABN_PHI_M = self._ABN_PHI_M(self, Access.R, 0x0000FFFF, 0, signed=True) - self.ABN_PHI_E = self._ABN_PHI_E(self, Access.R, 0xFFFF0000, 16, signed=True) + self.PHI_M = self._PHI_M(self, Access.R, 0x0000FFFF, 0, signed=True) + self.PHI_E = self._PHI_E(self, Access.R, 0xFFFF0000, 16, signed=True) class _ABN_MODE(Register): @@ -1619,40 +1056,40 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("ABN_MODE", parent, access, address, block, signed) - self.A_POL = self._A_POL(self, Access.RW, 0x00000001, 0, signed=False) - self.B_POL = self._B_POL(self, Access.RW, 0x00000002, 1, signed=False) - self.N_POL = self._N_POL(self, Access.RW, 0x00000004, 2, signed=False) - self.COMBINED_N = self._COMBINED_N(self, Access.RW, 0x00000008, 3, signed=False) + self.A_POL = self._A_POL( self, Access.RW, 0x00000001, 0, signed=False) + self.B_POL = self._B_POL( self, Access.RW, 0x00000002, 1, signed=False) + self.N_POL = self._N_POL( self, Access.RW, 0x00000004, 2, signed=False) + self.COMBINED_N = self._COMBINED_N( self, Access.RW, 0x00000008, 3, signed=False) self.CLEAR_COUNT_ON_N = self._CLEAR_COUNT_ON_N(self, Access.RW, 0x00000010, 4, signed=False) - self.DISABLE_FILTER = self._DISABLE_FILTER(self, Access.RW, 0x00000020, 5, signed=False) - self.CLN = self._CLN(self, Access.RW, 0x00000100, 8, signed=False) - self.DIRECTION = self._DIRECTION(self, Access.RW, 0x00001000, 12, signed=False) + self.DISABLE_FILTER = self._DISABLE_FILTER( self, Access.RW, 0x00000020, 5, signed=False) + self.CLN = self._CLN( self, Access.RW, 0x00000100, 8, signed=False) + self.DIRECTION = self._DIRECTION( self, Access.RW, 0x00001000, 12, signed=False) - class _ABN_PPR(Register): + class _ABN_CPR(Register): - class _ABN_PPR(Field): + class _ABN_CPR(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ABN_PPR", parent, access, mask, shift, signed=signed) + super().__init__("ABN_CPR", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): - super().__init__("ABN_PPR", parent, access, address, block, signed) - self.ABN_PPR = self._ABN_PPR(self, Access.RW, 0x00FFFFFF, 0, signed=False) + super().__init__("ABN_CPR", parent, access, address, block, signed) + self.ABN_CPR = self._ABN_CPR(self, Access.RW, 0x00FFFFFF, 0, signed=False) - class _ABN_PPR_INV(Register): + class _ABN_CPR_INV(Register): - class _ABN_PPR_INV(Field): + class _ABN_CPR_INV(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("ABN_PPR_INV", parent, access, mask, shift, signed=signed) + super().__init__("ABN_CPR_INV", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): - super().__init__("ABN_PPR_INV", parent, access, address, block, signed) - self.ABN_PPR_INV = self._ABN_PPR_INV(self, Access.RW, 0xFFFFFFFF, 0, signed=False) + super().__init__("ABN_CPR_INV", parent, access, address, block, signed) + self.ABN_CPR_INV = self._ABN_CPR_INV(self, Access.RW, 0xFFFFFFFF, 0, signed=False) class _ABN_COUNT(Register): @@ -1711,19 +1148,21 @@ def __init__(self, parent, access, mask, shift, signed): class _ORDER(Field): + class _Choices: + def __init__(self, parent) -> None: + self.UVW = Choice(0, parent) + self.VWU = Choice(1, parent) + self.WUV = Choice(2, parent) + self.RESERVED = Choice(3, parent) + self.UWV = Choice(4, parent) + self.VUW = Choice(5, parent) + self.WVU = Choice(6, parent) + self.RESERVED2 = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("ORDER", parent, access, mask, shift, signed=signed) - self.choice : _ORDER_FIELD_CHOICES = { - "UVW Hall Signal Order U/V/W": Choice(0, self), - "VWU Hall Signal Order V/W/U": Choice(1, self), - "WUV Hall Signal Order W/U/V": Choice(2, self), - "RESERVED reserved": Choice(3, self), - "UWV Hall Signal Order U/W/V": Choice(4, self), - "VUW Hall Signal Order V/U/W": Choice(5, self), - "WVU Hall Signal Order W/V/U": Choice(6, self), - "RESERVED2 reserved": Choice(7, self), - } + self.choice = self._Choices(self) class _FILTER(Field): @@ -1734,10 +1173,10 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("HALL_MODE", parent, access, address, block, signed) - self.POLARITY = self._POLARITY(self, Access.RW, 0x00000001, 0, signed=False) + self.POLARITY = self._POLARITY( self, Access.RW, 0x00000001, 0, signed=False) self.EXTRAPOLATION = self._EXTRAPOLATION(self, Access.RW, 0x00000002, 1, signed=False) - self.ORDER = self._ORDER(self, Access.RW, 0x00000070, 4, signed=False) - self.FILTER = self._FILTER(self, Access.RW, 0x0000FF00, 8, signed=False) + self.ORDER = self._ORDER( self, Access.RW, 0x00000070, 4, signed=False) + self.FILTER = self._FILTER( self, Access.RW, 0x0000FF00, 8, signed=False) class _HALL_DPHI_MAX(Register): @@ -1780,24 +1219,24 @@ def __init__(self, parent, access, address, block, signed): class _HALL_PHI_E_EXTRAPOLATED_PHI_E(Register): - class _HALL_PHI_E(Field): + class _PHI_E(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("HALL_PHI_E", parent, access, mask, shift, signed=signed) + super().__init__("PHI_E", parent, access, mask, shift, signed=signed) self.choice = None - class _HALL_PHI_E_EXTRAPOLATED(Field): + class _PHI_E_EXTRAPOLATED(Field): def __init__(self, parent, access, mask, shift, signed): - super().__init__("HALL_PHI_E_EXTRAPOLATED", parent, access, mask, shift, signed=signed) + super().__init__("PHI_E_EXTRAPOLATED", parent, access, mask, shift, signed=signed) self.choice = None def __init__(self, parent, access, address, block, signed): super().__init__("HALL_PHI_E_EXTRAPOLATED_PHI_E", parent, access, address, block, signed) - self.HALL_PHI_E = self._HALL_PHI_E(self, Access.R, 0x0000FFFF, 0, signed=True) - self.HALL_PHI_E_EXTRAPOLATED = self._HALL_PHI_E_EXTRAPOLATED(self, Access.R, 0xFFFF0000, 16, signed=True) + self.PHI_E = self._PHI_E( self, Access.R, 0x0000FFFF, 0, signed=True) + self.PHI_E_EXTRAPOLATED = self._PHI_E_EXTRAPOLATED(self, Access.R, 0xFFFF0000, 16, signed=True) class _HALL_POSITION_060_POSITION_000(Register): @@ -2022,21 +1461,24 @@ class _VELOCITY_CONFIG(Register): class _SELECTION(Field): + class _Choices: + def __init__(self, parent) -> None: + self.PHI_E = Choice(0, parent) + self.PHI_E_EXT = Choice(1, parent) + self.PHI_E_RAMP = Choice(2, parent) + self.PHI_E_ABN = Choice(3, parent) + self.RAMP_X_ACTUAL = Choice(4, parent) + self.PHI_E_HAL = Choice(5, parent) + self.PHI_M_EXT = Choice(6, parent) + self.Reserved = Choice(11, parent) + self.ABN_COUNT = Choice(8, parent) + self.PHI_M_ABN = Choice(9, parent) + self.HALL_COUNT = Choice(12, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("SELECTION", parent, access, mask, shift, signed=signed) - self.choice : _SELECTION_FIELD_CHOICES = { - "phi_e phi_e selected via PHI_E_SELECTION": Choice(0, self), - "phi_e_ext phi_e_ext": Choice(1, self), - "phi_e_ramp phi_e_ramp": Choice(2, self), - "phi_e_abn phi_e_abn": Choice(3, self), - "ramp_X_actual ramp_X_actual": Choice(4, self), - "phi_e_hal phi_e_hal (Don't use 0x0 with extrapolated Hall)": Choice(5, self), - "phi_m_ext phi_m_ext": Choice(6, self), - "abn_count abn_count": Choice(8, self), - "phi_m_abn phi_m_abn": Choice(9, self), - "hall_count hall_count": Choice(12, self), - } + self.choice = self._Choices(self) class _METER_SYNC_PULSE(Field): @@ -2047,32 +1489,40 @@ def __init__(self, parent, access, mask, shift, signed): class _METER_TYPE(Field): + class _Choices: + def __init__(self, parent) -> None: + self.VELOCITY_PER = Choice(0, parent) + self.VELOCITY_FREQ = Choice(1, parent) + self.VELOCITY_EXT = Choice(2, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("METER_TYPE", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _MOVING_AVRG_FILTER_SAMPLES(Field): + class _Choices: + def __init__(self, parent) -> None: + self.AVRG_1 = Choice(0, parent) + self.AVRG_2 = Choice(1, parent) + self.AVRG_3 = Choice(2, parent) + self.AVRG_4 = Choice(3, parent) + self.AVRG_5 = Choice(4, parent) + self.AVRG_6 = Choice(5, parent) + self.AVRG_7 = Choice(6, parent) + self.AVRG_8 = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("MOVING_AVRG_FILTER_SAMPLES", parent, access, mask, shift, signed=signed) - self.choice : _MOVING_AVRG_FILTER_SAMPLES_FIELD_CHOICES = { - "1 No additional filter": Choice(0, self), - "2 Average over 2 samples": Choice(1, self), - "3 Average over 3 samples": Choice(2, self), - "4 Average over 4 samples": Choice(3, self), - "5 Average over 5 samples": Choice(4, self), - "6 Average over 6 samples": Choice(5, self), - "7 Average over 7 samples": Choice(6, self), - "8 Average over 8 samples": Choice(7, self), - } + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("VELOCITY_CONFIG", parent, access, address, block, signed) - self.SELECTION = self._SELECTION(self, Access.RW, 0x000000FF, 0, signed=False) - self.METER_SYNC_PULSE = self._METER_SYNC_PULSE(self, Access.RW, 0x00000100, 8, signed=False) - self.METER_TYPE = self._METER_TYPE(self, Access.RW, 0x00000600, 9, signed=False) + self.SELECTION = self._SELECTION( self, Access.RW, 0x000000FF, 0, signed=False) + self.METER_SYNC_PULSE = self._METER_SYNC_PULSE( self, Access.RW, 0x00000100, 8, signed=False) + self.METER_TYPE = self._METER_TYPE( self, Access.RW, 0x00000600, 9, signed=False) self.MOVING_AVRG_FILTER_SAMPLES = self._MOVING_AVRG_FILTER_SAMPLES(self, Access.RW, 0x00007000, 12, signed=False) class _VELOCITY_SCALING(Register): @@ -2086,7 +1536,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("VELOCITY_SCALING", parent, access, address, block, signed) - self.VELOCITY_SCALING = self._VELOCITY_SCALING(self, Access.RW, 0x0000FFFF, 0, signed=False) + self.VELOCITY_SCALING = self._VELOCITY_SCALING(self, Access.RW, 0x0000FFFF, 0, signed=True) class _V_MIN_POS_DEV_TIME_COUNTER_LIMIT(Register): @@ -2107,7 +1557,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("V_MIN_POS_DEV_TIME_COUNTER_LIMIT", parent, access, address, block, signed) self.TIME_COUNTER_LIMIT = self._TIME_COUNTER_LIMIT(self, Access.RW, 0x0000FFFF, 0, signed=False) - self.V_MIN_POS_DEV = self._V_MIN_POS_DEV(self, Access.RW, 0x7FFF0000, 16, signed=False) + self.V_MIN_POS_DEV = self._V_MIN_POS_DEV( self, Access.RW, 0x7FFF0000, 16, signed=False) class _MAX_VEL_DEVIATION(Register): @@ -2126,10 +1576,24 @@ class _POSITION_CONFIG(Register): class _SELECTION(Field): + class _Choices: + def __init__(self, parent) -> None: + self.PHI_E = Choice(0, parent) + self.PHI_E_EXT = Choice(1, parent) + self.PHI_E_RAMP = Choice(2, parent) + self.PHI_E_ABN = Choice(3, parent) + self.RAMP_X_ACTUAL = Choice(4, parent) + self.PHI_E_HAL = Choice(5, parent) + self.PHI_M_EXT = Choice(6, parent) + self.Reserved = Choice(11, parent) + self.ABN_COUNT = Choice(8, parent) + self.PHI_M_ABN = Choice(9, parent) + self.HALL_COUNT = Choice(12, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("SELECTION", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("POSITION_CONFIG", parent, access, address, block, signed) @@ -2148,19 +1612,6 @@ def __init__(self, parent, access, address, block, signed): super().__init__("MAX_POS_DEVIATION", parent, access, address, block, signed) self.MAX_POS_DEVIATION = self._MAX_POS_DEVIATION(self, Access.RW, 0x7FFFFFFF, 0, signed=False) - class _POSITION_STEP_WIDTH(Register): - - class _POSITION_STEP_WIDTH(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("POSITION_STEP_WIDTH", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("POSITION_STEP_WIDTH", parent, access, address, block, signed) - self.POSITION_STEP_WIDTH = self._POSITION_STEP_WIDTH(self, Access.RW, 0xFFFFFFFF, 0, signed=False) - class _RAMPER_STATUS(Register): class _STATUS_STOP_L(Field): @@ -2291,24 +1742,24 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("RAMPER_STATUS", parent, access, address, block, signed) - self.STATUS_STOP_L = self._STATUS_STOP_L(self, Access.R, 0x00000001, 0, signed=False) - self.STATUS_STOP_R = self._STATUS_STOP_R(self, Access.R, 0x00000002, 1, signed=False) - self.STATUS_STOP_H = self._STATUS_STOP_H(self, Access.R, 0x00000004, 2, signed=False) - self.STATUS_LATCH_L = self._STATUS_LATCH_L(self, Access.RWC, 0x00000008, 3, signed=False) - self.STATUS_LATCH_R = self._STATUS_LATCH_R(self, Access.RWC, 0x00000010, 4, signed=False) - self.STATUS_LATCH_H = self._STATUS_LATCH_H(self, Access.RWC, 0x00000020, 5, signed=False) - self.EVENT_STOP_L = self._EVENT_STOP_L(self, Access.R, 0x00000040, 6, signed=False) - self.EVENT_STOP_R = self._EVENT_STOP_R(self, Access.R, 0x00000080, 7, signed=False) - self.EVENT_STOP_H = self._EVENT_STOP_H(self, Access.R, 0x00000100, 8, signed=False) - self.EVENT_STOP_SG = self._EVENT_STOP_SG(self, Access.RWC, 0x00000200, 9, signed=False) + self.STATUS_STOP_L = self._STATUS_STOP_L( self, Access.R, 0x00000001, 0, signed=False) + self.STATUS_STOP_R = self._STATUS_STOP_R( self, Access.R, 0x00000002, 1, signed=False) + self.STATUS_STOP_H = self._STATUS_STOP_H( self, Access.R, 0x00000004, 2, signed=False) + self.STATUS_LATCH_L = self._STATUS_LATCH_L( self, Access.RWC, 0x00000008, 3, signed=False) + self.STATUS_LATCH_R = self._STATUS_LATCH_R( self, Access.RWC, 0x00000010, 4, signed=False) + self.STATUS_LATCH_H = self._STATUS_LATCH_H( self, Access.RWC, 0x00000020, 5, signed=False) + self.EVENT_STOP_L = self._EVENT_STOP_L( self, Access.R, 0x00000040, 6, signed=False) + self.EVENT_STOP_R = self._EVENT_STOP_R( self, Access.R, 0x00000080, 7, signed=False) + self.EVENT_STOP_H = self._EVENT_STOP_H( self, Access.R, 0x00000100, 8, signed=False) + self.EVENT_STOP_SG = self._EVENT_STOP_SG( self, Access.RWC, 0x00000200, 9, signed=False) self.EVENT_POS_REACHED = self._EVENT_POS_REACHED(self, Access.RWC, 0x00000400, 10, signed=False) - self.VELOCITY_REACHED = self._VELOCITY_REACHED(self, Access.R, 0x00000800, 11, signed=False) - self.POSITION_REACHED = self._POSITION_REACHED(self, Access.R, 0x00001000, 12, signed=False) - self.V_ZERO = self._V_ZERO(self, Access.R, 0x00002000, 13, signed=False) + self.VELOCITY_REACHED = self._VELOCITY_REACHED( self, Access.R, 0x00000800, 11, signed=False) + self.POSITION_REACHED = self._POSITION_REACHED( self, Access.R, 0x00001000, 12, signed=False) + self.V_ZERO = self._V_ZERO( self, Access.R, 0x00002000, 13, signed=False) self.T_ZEROWAIT_ACTIVE = self._T_ZEROWAIT_ACTIVE(self, Access.R, 0x00004000, 14, signed=False) - self.SECOND_MOVE = self._SECOND_MOVE(self, Access.RWC, 0x00008000, 15, signed=False) - self.STALL_IN_VEL_ERR = self._STALL_IN_VEL_ERR(self, Access.R, 0x00010000, 16, signed=False) - self.STALL_IN_POS_ERR = self._STALL_IN_POS_ERR(self, Access.R, 0x00020000, 17, signed=False) + self.SECOND_MOVE = self._SECOND_MOVE( self, Access.RWC, 0x00008000, 15, signed=False) + self.STALL_IN_VEL_ERR = self._STALL_IN_VEL_ERR( self, Access.R, 0x00010000, 16, signed=False) + self.STALL_IN_POS_ERR = self._STALL_IN_POS_ERR( self, Access.R, 0x00020000, 17, signed=False) class _RAMPER_A1(Register): @@ -2603,25 +2054,25 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("RAMPER_SWITCH_MODE", parent, access, address, block, signed) - self.STOP_L_ENABLE = self._STOP_L_ENABLE(self, Access.RW, 0x00000001, 0, signed=False) - self.STOP_R_ENABLE = self._STOP_R_ENABLE(self, Access.RW, 0x00000002, 1, signed=False) - self.STOP_H_ENABLE = self._STOP_H_ENABLE(self, Access.RW, 0x00000004, 2, signed=False) - self.STOP_L_POL = self._STOP_L_POL(self, Access.RW, 0x00000008, 3, signed=False) - self.STOP_R_POL = self._STOP_R_POL(self, Access.RW, 0x00000010, 4, signed=False) - self.STOP_H_POL = self._STOP_H_POL(self, Access.RW, 0x00000020, 5, signed=False) - self.SWAP_LR = self._SWAP_LR(self, Access.RW, 0x00000040, 6, signed=False) - self.LATCH_L_ACTIVE = self._LATCH_L_ACTIVE(self, Access.RW, 0x00000080, 7, signed=False) - self.LATCH_L_INACTIVE = self._LATCH_L_INACTIVE(self, Access.RW, 0x00000100, 8, signed=False) - self.LATCH_R_ACTIVE = self._LATCH_R_ACTIVE(self, Access.RW, 0x00000200, 9, signed=False) - self.LATCH_R_INACTIVE = self._LATCH_R_INACTIVE(self, Access.RW, 0x00000400, 10, signed=False) - self.LATCH_H_ACTIVE = self._LATCH_H_ACTIVE(self, Access.RW, 0x00000800, 11, signed=False) - self.LATCH_H_INACTIVE = self._LATCH_H_INACTIVE(self, Access.RW, 0x00001000, 12, signed=False) - self.SG_STOP_ENABLE = self._SG_STOP_ENABLE(self, Access.RW, 0x00004000, 14, signed=False) - self.SOFTSTOP_ENABLE = self._SOFTSTOP_ENABLE(self, Access.RW, 0x00008000, 15, signed=False) - self.SW_HARD_STOP = self._SW_HARD_STOP(self, Access.RW, 0x00010000, 16, signed=False) + self.STOP_L_ENABLE = self._STOP_L_ENABLE( self, Access.RW, 0x00000001, 0, signed=False) + self.STOP_R_ENABLE = self._STOP_R_ENABLE( self, Access.RW, 0x00000002, 1, signed=False) + self.STOP_H_ENABLE = self._STOP_H_ENABLE( self, Access.RW, 0x00000004, 2, signed=False) + self.STOP_L_POL = self._STOP_L_POL( self, Access.RW, 0x00000008, 3, signed=False) + self.STOP_R_POL = self._STOP_R_POL( self, Access.RW, 0x00000010, 4, signed=False) + self.STOP_H_POL = self._STOP_H_POL( self, Access.RW, 0x00000020, 5, signed=False) + self.SWAP_LR = self._SWAP_LR( self, Access.RW, 0x00000040, 6, signed=False) + self.LATCH_L_ACTIVE = self._LATCH_L_ACTIVE( self, Access.RW, 0x00000080, 7, signed=False) + self.LATCH_L_INACTIVE = self._LATCH_L_INACTIVE( self, Access.RW, 0x00000100, 8, signed=False) + self.LATCH_R_ACTIVE = self._LATCH_R_ACTIVE( self, Access.RW, 0x00000200, 9, signed=False) + self.LATCH_R_INACTIVE = self._LATCH_R_INACTIVE( self, Access.RW, 0x00000400, 10, signed=False) + self.LATCH_H_ACTIVE = self._LATCH_H_ACTIVE( self, Access.RW, 0x00000800, 11, signed=False) + self.LATCH_H_INACTIVE = self._LATCH_H_INACTIVE( self, Access.RW, 0x00001000, 12, signed=False) + self.SG_STOP_ENABLE = self._SG_STOP_ENABLE( self, Access.RW, 0x00004000, 14, signed=False) + self.SOFTSTOP_ENABLE = self._SOFTSTOP_ENABLE( self, Access.RW, 0x00008000, 15, signed=False) + self.SW_HARD_STOP = self._SW_HARD_STOP( self, Access.RW, 0x00010000, 16, signed=False) self.STOP_ON_POS_DEVIATION = self._STOP_ON_POS_DEVIATION(self, Access.RW, 0x00020000, 17, signed=False) self.STOP_ON_VEL_DEVIATION = self._STOP_ON_VEL_DEVIATION(self, Access.RW, 0x00040000, 18, signed=False) - self.VELOCITY_OVERWRITE = self._VELOCITY_OVERWRITE(self, Access.RW, 0x00080000, 19, signed=False) + self.VELOCITY_OVERWRITE = self._VELOCITY_OVERWRITE( self, Access.RW, 0x00080000, 19, signed=False) class _RAMPER_TIME_CONFIG(Register): @@ -2642,7 +2093,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("RAMPER_TIME_CONFIG", parent, access, address, block, signed) self.T_ZEROWAIT = self._T_ZEROWAIT(self, Access.RW, 0x0000FFFF, 0, signed=False) - self.T_VMAX = self._T_VMAX(self, Access.RW, 0xFFFF0000, 16, signed=False) + self.T_VMAX = self._T_VMAX( self, Access.RW, 0xFFFF0000, 16, signed=False) class _RAMPER_A_ACTUAL(Register): @@ -2733,14 +2184,24 @@ def __init__(self, parent, access, mask, shift, signed): class _SHIFT(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SHIFT_0 = Choice(0, parent) + self.SHIFT_4 = Choice(1, parent) + self.SHIFT_8 = Choice(2, parent) + self.SHIFT_12 = Choice(3, parent) + self.SHIFT_16 = Choice(4, parent) + self.SHIFT_20 = Choice(5, parent) + self.SHIFT_24 = Choice(6, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("SHIFT", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("RAMPER_ACC_FF", parent, access, address, block, signed) - self.GAIN = self._GAIN(self, Access.RW, 0x0000FFFF, 0, signed=False) + self.GAIN = self._GAIN( self, Access.RW, 0x0000FFFF, 0, signed=False) self.SHIFT = self._SHIFT(self, Access.RW, 0x00070000, 16, signed=False) class _RAMPER_X_ACTUAL_LATCH(Register): @@ -2820,31 +2281,59 @@ def __init__(self, parent, access, mask, shift, signed): class _VELOCITY_NORM_P(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SHIFT_0 = Choice(0, parent) + self.SHIFT_8 = Choice(1, parent) + self.SHIFT_16 = Choice(2, parent) + self.SHIFT_24 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VELOCITY_NORM_P", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _VELOCITY_NORM_I(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SHIFT_8 = Choice(0, parent) + self.SHIFT_16 = Choice(1, parent) + self.SHIFT_24 = Choice(2, parent) + self.SHIFT_32 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VELOCITY_NORM_I", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _POSITION_NORM_P(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SHIFT_0 = Choice(0, parent) + self.SHIFT_8 = Choice(1, parent) + self.SHIFT_16 = Choice(2, parent) + self.SHIFT_24 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("POSITION_NORM_P", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _POSITION_NORM_I(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SHIFT_8 = Choice(0, parent) + self.SHIFT_16 = Choice(1, parent) + self.SHIFT_24 = Choice(2, parent) + self.SHIFT_32 = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("POSITION_NORM_I", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) class _VEL_SCALE(Field): @@ -2870,15 +2359,15 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PID_CONFIG", parent, access, address, block, signed) self.KEEP_POS_TARGET = self._KEEP_POS_TARGET(self, Access.RW, 0x00000001, 0, signed=False) - self.CURRENT_NORM_P = self._CURRENT_NORM_P(self, Access.RW, 0x00000004, 2, signed=False) - self.CURRENT_NORM_I = self._CURRENT_NORM_I(self, Access.RW, 0x00000008, 3, signed=False) + self.CURRENT_NORM_P = self._CURRENT_NORM_P( self, Access.RW, 0x00000004, 2, signed=False) + self.CURRENT_NORM_I = self._CURRENT_NORM_I( self, Access.RW, 0x00000008, 3, signed=False) self.VELOCITY_NORM_P = self._VELOCITY_NORM_P(self, Access.RW, 0x00000030, 4, signed=False) self.VELOCITY_NORM_I = self._VELOCITY_NORM_I(self, Access.RW, 0x000000C0, 6, signed=False) self.POSITION_NORM_P = self._POSITION_NORM_P(self, Access.RW, 0x00000300, 8, signed=False) self.POSITION_NORM_I = self._POSITION_NORM_I(self, Access.RW, 0x00000C00, 10, signed=False) - self.VEL_SCALE = self._VEL_SCALE(self, Access.RW, 0x0000F000, 12, signed=False) - self.POS_SMPL = self._POS_SMPL(self, Access.RW, 0x007F0000, 16, signed=False) - self.VEL_SMPL = self._VEL_SMPL(self, Access.RW, 0x7F000000, 24, signed=False) + self.VEL_SCALE = self._VEL_SCALE( self, Access.RW, 0x0000F000, 12, signed=False) + self.POS_SMPL = self._POS_SMPL( self, Access.RW, 0x007F0000, 16, signed=False) + self.VEL_SMPL = self._VEL_SMPL( self, Access.RW, 0x7F000000, 24, signed=False) class _PID_FLUX_COEFF(Register): @@ -3055,7 +2544,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PID_TORQUE_FLUX_LIMITS", parent, access, address, block, signed) - self.PID_FLUX_LIMIT = self._PID_FLUX_LIMIT(self, Access.RW, 0x00007FFF, 0, signed=False) + self.PID_FLUX_LIMIT = self._PID_FLUX_LIMIT( self, Access.RW, 0x00007FFF, 0, signed=False) self.PID_TORQUE_LIMIT = self._PID_TORQUE_LIMIT(self, Access.RW, 0x7FFF0000, 16, signed=False) class _PID_VELOCITY_LIMIT(Register): @@ -3115,7 +2604,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PID_TORQUE_FLUX_TARGET", parent, access, address, block, signed) - self.PID_FLUX_TARGET = self._PID_FLUX_TARGET(self, Access.RW, 0x0000FFFF, 0, signed=True) + self.PID_FLUX_TARGET = self._PID_FLUX_TARGET( self, Access.RW, 0x0000FFFF, 0, signed=True) self.PID_TORQUE_TARGET = self._PID_TORQUE_TARGET(self, Access.RW, 0xFFFF0000, 16, signed=True) class _PID_TORQUE_FLUX_OFFSET(Register): @@ -3136,7 +2625,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PID_TORQUE_FLUX_OFFSET", parent, access, address, block, signed) - self.PID_FLUX_OFFSET = self._PID_FLUX_OFFSET(self, Access.RW, 0x0000FFFF, 0, signed=True) + self.PID_FLUX_OFFSET = self._PID_FLUX_OFFSET( self, Access.RW, 0x0000FFFF, 0, signed=True) self.PID_TORQUE_OFFSET = self._PID_TORQUE_OFFSET(self, Access.RW, 0xFFFF0000, 16, signed=True) class _PID_VELOCITY_TARGET(Register): @@ -3196,7 +2685,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PID_TORQUE_FLUX_ACTUAL", parent, access, address, block, signed) - self.PID_FLUX_ACTUAL = self._PID_FLUX_ACTUAL(self, Access.R, 0x0000FFFF, 0, signed=True) + self.PID_FLUX_ACTUAL = self._PID_FLUX_ACTUAL( self, Access.R, 0x0000FFFF, 0, signed=True) self.PID_TORQUE_ACTUAL = self._PID_TORQUE_ACTUAL(self, Access.R, 0xFFFF0000, 16, signed=True) class _PID_VELOCITY_ACTUAL(Register): @@ -3360,7 +2849,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PIDIN_TORQUE_FLUX_TARGET", parent, access, address, block, signed) - self.PIDIN_FLUX_TARGET = self._PIDIN_FLUX_TARGET(self, Access.R, 0x0000FFFF, 0, signed=True) + self.PIDIN_FLUX_TARGET = self._PIDIN_FLUX_TARGET( self, Access.R, 0x0000FFFF, 0, signed=True) self.PIDIN_TORQUE_TARGET = self._PIDIN_TORQUE_TARGET(self, Access.R, 0xFFFF0000, 16, signed=True) class _PIDIN_VELOCITY_TARGET(Register): @@ -3407,7 +2896,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PIDIN_TORQUE_FLUX_TARGET_LIMITED", parent, access, address, block, signed) - self.PIDIN_FLUX_TARGET_LIMITED = self._PIDIN_FLUX_TARGET_LIMITED(self, Access.R, 0x0000FFFF, 0, signed=True) + self.PIDIN_FLUX_TARGET_LIMITED = self._PIDIN_FLUX_TARGET_LIMITED( self, Access.R, 0x0000FFFF, 0, signed=True) self.PIDIN_TORQUE_TARGET_LIMITED = self._PIDIN_TORQUE_TARGET_LIMITED(self, Access.R, 0xFFFF0000, 16, signed=True) class _PIDIN_VELOCITY_TARGET_LIMITED(Register): @@ -3455,7 +2944,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("FOC_IBETA_IALPHA", parent, access, address, block, signed) self.IALPHA = self._IALPHA(self, Access.R, 0x0000FFFF, 0, signed=True) - self.IBETA = self._IBETA(self, Access.R, 0xFFFF0000, 16, signed=True) + self.IBETA = self._IBETA( self, Access.R, 0xFFFF0000, 16, signed=True) class _FOC_IQ_ID(Register): @@ -3539,7 +3028,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("FOC_UBETA_UALPHA", parent, access, address, block, signed) self.UALPHA = self._UALPHA(self, Access.R, 0x0000FFFF, 0, signed=True) - self.UBETA = self._UBETA(self, Access.R, 0xFFFF0000, 16, signed=True) + self.UBETA = self._UBETA( self, Access.R, 0xFFFF0000, 16, signed=True) class _FOC_UWY_UUX(Register): @@ -3615,7 +3104,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PWM_Y2_WY1", parent, access, address, block, signed) self.WY1 = self._WY1(self, Access.R, 0x0000FFFF, 0, signed=False) - self.Y2 = self._Y2(self, Access.R, 0xFFFF0000, 16, signed=False) + self.Y2 = self._Y2( self, Access.R, 0xFFFF0000, 16, signed=False) class _VELOCITY_FRQ(Register): @@ -3643,19 +3132,6 @@ def __init__(self, parent, access, address, block, signed): super().__init__("VELOCITY_PER", parent, access, address, block, signed) self.VELOCITY_PER = self._VELOCITY_PER(self, Access.R, 0xFFFFFFFF, 0, signed=True) - class _FOC_STATUS(Register): - - class _FOC_STATUS(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("FOC_STATUS", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FOC_STATUS", parent, access, address, block, signed) - self.FOC_STATUS = self._FOC_STATUS(self, Access.R, 0x0000000F, 0, signed=False) - class _U_S_ACTUAL_I_S_ACTUAL(Register): class _I_S_ACTUAL(Field): @@ -3785,16 +3261,16 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("INPUTS_RAW", parent, access, address, block, signed) - self.ENC_A = self._ENC_A(self, Access.R, 0x00000001, 0, signed=False) - self.ENC_B = self._ENC_B(self, Access.R, 0x00000002, 1, signed=False) - self.ENC_N = self._ENC_N(self, Access.R, 0x00000004, 2, signed=False) - self.HALL_U = self._HALL_U(self, Access.R, 0x00000100, 8, signed=False) - self.HALL_V = self._HALL_V(self, Access.R, 0x00000200, 9, signed=False) - self.HALL_W = self._HALL_W(self, Access.R, 0x00000400, 10, signed=False) - self.REF_SW_R = self._REF_SW_R(self, Access.R, 0x00001000, 12, signed=False) - self.REF_SW_L = self._REF_SW_L(self, Access.R, 0x00002000, 13, signed=False) - self.REF_SW_H = self._REF_SW_H(self, Access.R, 0x00004000, 14, signed=False) - self.ENI = self._ENI(self, Access.R, 0x00008000, 15, signed=False) + self.ENC_A = self._ENC_A( self, Access.R, 0x00000001, 0, signed=False) + self.ENC_B = self._ENC_B( self, Access.R, 0x00000002, 1, signed=False) + self.ENC_N = self._ENC_N( self, Access.R, 0x00000004, 2, signed=False) + self.HALL_U = self._HALL_U( self, Access.R, 0x00000100, 8, signed=False) + self.HALL_V = self._HALL_V( self, Access.R, 0x00000200, 9, signed=False) + self.HALL_W = self._HALL_W( self, Access.R, 0x00000400, 10, signed=False) + self.REF_SW_R = self._REF_SW_R( self, Access.R, 0x00001000, 12, signed=False) + self.REF_SW_L = self._REF_SW_L( self, Access.R, 0x00002000, 13, signed=False) + self.REF_SW_H = self._REF_SW_H( self, Access.R, 0x00004000, 14, signed=False) + self.ENI = self._ENI( self, Access.R, 0x00008000, 15, signed=False) self.HALL_U_FILT = self._HALL_U_FILT(self, Access.R, 0x00100000, 20, signed=False) self.HALL_V_FILT = self._HALL_V_FILT(self, Access.R, 0x00200000, 21, signed=False) self.HALL_W_FILT = self._HALL_W_FILT(self, Access.R, 0x00400000, 22, signed=False) @@ -3865,8 +3341,8 @@ def __init__(self, parent, access, address, block, signed): self.PWM_VX2_H = self._PWM_VX2_H(self, Access.R, 0x00000008, 3, signed=False) self.PWM_WY1_L = self._PWM_WY1_L(self, Access.R, 0x00000010, 4, signed=False) self.PWM_WY1_H = self._PWM_WY1_H(self, Access.R, 0x00000020, 5, signed=False) - self.PWM_Y2_L = self._PWM_Y2_L(self, Access.R, 0x00000040, 6, signed=False) - self.PWM_Y2_H = self._PWM_Y2_H(self, Access.R, 0x00000080, 7, signed=False) + self.PWM_Y2_L = self._PWM_Y2_L( self, Access.R, 0x00000040, 6, signed=False) + self.PWM_Y2_H = self._PWM_Y2_H( self, Access.R, 0x00000080, 7, signed=False) class _STATUS_FLAGS(Register): @@ -4033,215 +3509,29 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("STATUS_FLAGS", parent, access, address, block, signed) - self.PID_X_TARGET_LIMIT = self._PID_X_TARGET_LIMIT(self, Access.RWC, 0x00000001, 0, signed=False) - self.PID_X_OUTPUT_LIMIT = self._PID_X_OUTPUT_LIMIT(self, Access.RWC, 0x00000002, 1, signed=False) - self.PID_V_TARGET_LIMIT = self._PID_V_TARGET_LIMIT(self, Access.RWC, 0x00000004, 2, signed=False) - self.PID_V_OUTPUT_LIMIT = self._PID_V_OUTPUT_LIMIT(self, Access.RWC, 0x00000008, 3, signed=False) - self.PID_ID_TARGET_LIMIT = self._PID_ID_TARGET_LIMIT(self, Access.RWC, 0x00000010, 4, signed=False) - self.PID_ID_OUTPUT_LIMIT = self._PID_ID_OUTPUT_LIMIT(self, Access.RWC, 0x00000020, 5, signed=False) - self.PID_IQ_TARGET_LIMIT = self._PID_IQ_TARGET_LIMIT(self, Access.RWC, 0x00000040, 6, signed=False) - self.PID_IQ_OUTPUT_LIMIT = self._PID_IQ_OUTPUT_LIMIT(self, Access.RWC, 0x00000080, 7, signed=False) - self.IPARK_VOLTLIM_LIMIT_U = self._IPARK_VOLTLIM_LIMIT_U(self, Access.RWC, 0x00000100, 8, signed=False) + self.PID_X_TARGET_LIMIT = self._PID_X_TARGET_LIMIT( self, Access.RWC, 0x00000001, 0, signed=False) + self.PID_X_OUTPUT_LIMIT = self._PID_X_OUTPUT_LIMIT( self, Access.RWC, 0x00000002, 1, signed=False) + self.PID_V_TARGET_LIMIT = self._PID_V_TARGET_LIMIT( self, Access.RWC, 0x00000004, 2, signed=False) + self.PID_V_OUTPUT_LIMIT = self._PID_V_OUTPUT_LIMIT( self, Access.RWC, 0x00000008, 3, signed=False) + self.PID_ID_TARGET_LIMIT = self._PID_ID_TARGET_LIMIT( self, Access.RWC, 0x00000010, 4, signed=False) + self.PID_ID_OUTPUT_LIMIT = self._PID_ID_OUTPUT_LIMIT( self, Access.RWC, 0x00000020, 5, signed=False) + self.PID_IQ_TARGET_LIMIT = self._PID_IQ_TARGET_LIMIT( self, Access.RWC, 0x00000040, 6, signed=False) + self.PID_IQ_OUTPUT_LIMIT = self._PID_IQ_OUTPUT_LIMIT( self, Access.RWC, 0x00000080, 7, signed=False) + self.IPARK_VOLTLIM_LIMIT_U = self._IPARK_VOLTLIM_LIMIT_U( self, Access.RWC, 0x00000100, 8, signed=False) self.PWM_SWITCH_LIMIT_ACTIVE = self._PWM_SWITCH_LIMIT_ACTIVE(self, Access.RWC, 0x00000200, 9, signed=False) - self.HALL_ERROR = self._HALL_ERROR(self, Access.RWC, 0x00000800, 11, signed=False) + self.HALL_ERROR = self._HALL_ERROR( self, Access.RWC, 0x00000800, 11, signed=False) self.POSITION_TRACKING_ERROR = self._POSITION_TRACKING_ERROR(self, Access.RWC, 0x00001000, 12, signed=False) self.VELOCITY_TRACKING_ERROR = self._VELOCITY_TRACKING_ERROR(self, Access.RWC, 0x00002000, 13, signed=False) - self.PID_FW_OUTPUT_LIMIT = self._PID_FW_OUTPUT_LIMIT(self, Access.RWC, 0x00004000, 14, signed=False) - self.WATCHDOG = self._WATCHDOG(self, Access.RWC, 0x00010000, 16, signed=False) - self.SHORT = self._SHORT(self, Access.RWC, 0x00020000, 17, signed=False) - self.REF_SW_L = self._REF_SW_L(self, Access.RWC, 0x00100000, 20, signed=False) - self.REF_SW_R = self._REF_SW_R(self, Access.RWC, 0x00200000, 21, signed=False) - self.REF_SW_H = self._REF_SW_H(self, Access.RWC, 0x00400000, 22, signed=False) - self.POSITION_REACHED = self._POSITION_REACHED(self, Access.RWC, 0x00800000, 23, signed=False) - self.ADC_I_CLIPPED = self._ADC_I_CLIPPED(self, Access.RWC, 0x04000000, 26, signed=False) - self.ENC_N = self._ENC_N(self, Access.RWC, 0x10000000, 28, signed=False) - self.ENI = self._ENI(self, Access.RWC, 0x80000000, 31, signed=False) - - class _STATUS_MASK(Register): - - class _STATUS_MASK(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("STATUS_MASK", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("STATUS_MASK", parent, access, address, block, signed) - self.STATUS_MASK = self._STATUS_MASK(self, Access.RW, 0xFFFFFFFF, 0, signed=False) - - class _FLEX_COMP_CONF(Register): - - class _START_SELECT(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("START_SELECT", parent, access, mask, shift, signed=signed) - - self.choice : _START_SELECT_FIELD_CHOICES = { - "PWM_CENTER center pulse of pwm": Choice(0, self), - "PWM_ZERO zero pulse of pwm": Choice(1, self), - "PWM_LS raw pwm ls generator output": Choice(2, self), - "PWM_HS raw pwm hs generator output": Choice(3, self), - "GDRV_LS_ON gdrv ls output signal": Choice(4, self), - "GDRV_HS_ON gdrv hs output signal": Choice(5, self), - "OCP_LS_CMP raw ls ocp comperator out": Choice(6, self), - "OCP_HS_CMP raw hs ocp comperator out": Choice(7, self), - "VGS_LS_ON raw ls vgs on out": Choice(8, self), - "VGS_HS_ON raw hs vgs on out": Choice(9, self), - "VGS_LS_OFF raw ls vgs off out": Choice(10, self), - "VGS_HS_OFF raw hs vgs off out": Choice(11, self), - "PHASE_HIGH phase voltage greater than 0.9VM": Choice(12, self), - "PHASE_LOW phase voltage less than 0.1VM": Choice(13, self), - } - - class _START_DEGLITCH(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("START_DEGLITCH", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _START_EDGE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("START_EDGE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _END_SELECT(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("END_SELECT", parent, access, mask, shift, signed=signed) - - self.choice : _END_SELECT_FIELD_CHOICES = { - "PWM_CENTER center pulse of pwm": Choice(0, self), - "PWM_ZERO zero pulse of pwm": Choice(1, self), - "PWM_LS raw pwm ls generator output": Choice(2, self), - "PWM_HS raw pwm hs generator output": Choice(3, self), - "GDRV_LS_ON gdrv ls output signal": Choice(4, self), - "GDRV_HS_ON gdrv hs output signal": Choice(5, self), - "OCP_LS_CMP raw ls ocp comperator out": Choice(6, self), - "OCP_HS_CMP raw hs ocp comperator out": Choice(7, self), - "VGS_LS_ON raw ls vgs on out": Choice(8, self), - "VGS_HS_ON raw hs vgs on out": Choice(9, self), - "VGS_LS_OFF raw ls vgs off out": Choice(10, self), - "VGS_HS_OFF raw hs vgs off out": Choice(11, self), - "PHASE_HIGH phase voltage greater than 0.9VM": Choice(12, self), - "PHASE_LOW phase voltage less than 0.1VM": Choice(13, self), - } - - class _END_DEGLITCH(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("END_DEGLITCH", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _END_EDGE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("END_EDGE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SINGLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SINGLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CONTINUOUS(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CONTINUOUS", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DONE_U(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DONE_U", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DONE_V(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DONE_V", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DONE_W(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DONE_W", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _DONE_Y2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DONE_Y2", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FLEX_COMP_CONF", parent, access, address, block, signed) - self.START_SELECT = self._START_SELECT(self, Access.RW, 0x0000000F, 0, signed=False) - self.START_DEGLITCH = self._START_DEGLITCH(self, Access.RW, 0x000000F0, 4, signed=False) - self.START_EDGE = self._START_EDGE(self, Access.RW, 0x00000100, 8, signed=False) - self.END_SELECT = self._END_SELECT(self, Access.RW, 0x00001E00, 9, signed=False) - self.END_DEGLITCH = self._END_DEGLITCH(self, Access.RW, 0x0001E000, 13, signed=False) - self.END_EDGE = self._END_EDGE(self, Access.RW, 0x00020000, 17, signed=False) - self.SINGLE = self._SINGLE(self, Access.RWC, 0x01000000, 24, signed=False) - self.CONTINUOUS = self._CONTINUOUS(self, Access.RW, 0x02000000, 25, signed=False) - self.DONE_U = self._DONE_U(self, Access.RWC, 0x10000000, 28, signed=False) - self.DONE_V = self._DONE_V(self, Access.RWC, 0x20000000, 29, signed=False) - self.DONE_W = self._DONE_W(self, Access.RWC, 0x40000000, 30, signed=False) - self.DONE_Y2 = self._DONE_Y2(self, Access.RWC, 0x80000000, 31, signed=False) - - class _FLEX_COMP_RESULT_V_U(Register): - - class _U(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("U", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _V(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("V", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FLEX_COMP_RESULT_V_U", parent, access, address, block, signed) - self.U = self._U(self, Access.R, 0x0000FFFF, 0, signed=False) - self.V = self._V(self, Access.R, 0xFFFF0000, 16, signed=False) - - class _FLEX_COMP_RESULT_Y2_W(Register): - - class _W(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("W", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _Y2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("Y2", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FLEX_COMP_RESULT_Y2_W", parent, access, address, block, signed) - self.W = self._W(self, Access.R, 0x0000FFFF, 0, signed=False) - self.Y2 = self._Y2(self, Access.R, 0xFFFF0000, 16, signed=False) + self.PID_FW_OUTPUT_LIMIT = self._PID_FW_OUTPUT_LIMIT( self, Access.RWC, 0x00004000, 14, signed=False) + self.WATCHDOG = self._WATCHDOG( self, Access.RWC, 0x00010000, 16, signed=False) + self.SHORT = self._SHORT( self, Access.RWC, 0x00020000, 17, signed=False) + self.REF_SW_L = self._REF_SW_L( self, Access.RWC, 0x00100000, 20, signed=False) + self.REF_SW_R = self._REF_SW_R( self, Access.RWC, 0x00200000, 21, signed=False) + self.REF_SW_H = self._REF_SW_H( self, Access.RWC, 0x00400000, 22, signed=False) + self.POSITION_REACHED = self._POSITION_REACHED( self, Access.RWC, 0x00800000, 23, signed=False) + self.ADC_I_CLIPPED = self._ADC_I_CLIPPED( self, Access.RWC, 0x04000000, 26, signed=False) + self.ENC_N = self._ENC_N( self, Access.RWC, 0x10000000, 28, signed=False) + self.ENI = self._ENI( self, Access.RWC, 0x80000000, 31, signed=False) class _GDRV_HW(Register): @@ -4315,53 +3605,6 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None - class _DISCHARGE_BST(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("DISCHARGE_BST", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _PHASE_DIV_GAIN(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("PHASE_DIV_GAIN", parent, access, mask, shift, signed=signed) - - self.choice : _PHASE_DIV_GAIN_FIELD_CHOICES = { - "PHDIV_80 div80": Choice(0, self), - "PHDIV_40 div40": Choice(1, self), - "PHDIV_20 div20": Choice(2, self), - "PHDIV_10 div10": Choice(3, self), - } - - class _PHASE_DIV_EN_UVW(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("PHASE_DIV_EN_UVW", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _PHASE_DIV_EN_Y2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("PHASE_DIV_EN_Y2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _PHASE_CMP_EN_UVW(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("PHASE_CMP_EN_UVW", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _PHASE_CMP_EN_Y2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("PHASE_CMP_EN_Y2", parent, access, mask, shift, signed=signed) - - self.choice = None - class _CHARGEPUMP_EN(Field): def __init__(self, parent, access, mask, shift, signed): @@ -4383,133 +3626,127 @@ def __init__(self, parent, access, mask, shift, signed): self.choice = None - class _HIGHZ_ON_IDLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("HIGHZ_ON_IDLE", parent, access, mask, shift, signed=signed) - - self.choice = None - def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_HW", parent, access, address, block, signed) - self.BRIDGE_ENABLE_U = self._BRIDGE_ENABLE_U(self, Access.RW, 0x00000001, 0, signed=False) - self.BRIDGE_ENABLE_V = self._BRIDGE_ENABLE_V(self, Access.RW, 0x00000002, 1, signed=False) - self.BRIDGE_ENABLE_W = self._BRIDGE_ENABLE_W(self, Access.RW, 0x00000004, 2, signed=False) + self.BRIDGE_ENABLE_U = self._BRIDGE_ENABLE_U( self, Access.RW, 0x00000001, 0, signed=False) + self.BRIDGE_ENABLE_V = self._BRIDGE_ENABLE_V( self, Access.RW, 0x00000002, 1, signed=False) + self.BRIDGE_ENABLE_W = self._BRIDGE_ENABLE_W( self, Access.RW, 0x00000004, 2, signed=False) self.BRIDGE_ENABLE_Y2 = self._BRIDGE_ENABLE_Y2(self, Access.RW, 0x00000008, 3, signed=False) - self.LS_OCP_CMP_EN = self._LS_OCP_CMP_EN(self, Access.RW, 0x00000010, 4, signed=False) - self.HS_OCP_CMP_EN = self._HS_OCP_CMP_EN(self, Access.RW, 0x00000020, 5, signed=False) + self.LS_OCP_CMP_EN = self._LS_OCP_CMP_EN( self, Access.RW, 0x00000010, 4, signed=False) + self.HS_OCP_CMP_EN = self._HS_OCP_CMP_EN( self, Access.RW, 0x00000020, 5, signed=False) self.VDRV_UVLO_CMP_EN = self._VDRV_UVLO_CMP_EN(self, Access.RW, 0x00000040, 6, signed=False) - self.VS_UVLO_CMP_EN = self._VS_UVLO_CMP_EN(self, Access.RW, 0x00000080, 7, signed=False) - self.BST_ILIM_MAX = self._BST_ILIM_MAX(self, Access.RW, 0x00000700, 8, signed=False) - self.BST_SW_CP_EN = self._BST_SW_CP_EN(self, Access.RW, 0x00000800, 11, signed=False) - self.DISCHARGE_BST = self._DISCHARGE_BST(self, Access.RW, 0x00001000, 12, signed=False) - self.PHASE_DIV_GAIN = self._PHASE_DIV_GAIN(self, Access.RW, 0x00030000, 16, signed=False) - self.PHASE_DIV_EN_UVW = self._PHASE_DIV_EN_UVW(self, Access.RW, 0x00040000, 18, signed=False) - self.PHASE_DIV_EN_Y2 = self._PHASE_DIV_EN_Y2(self, Access.RW, 0x00080000, 19, signed=False) - self.PHASE_CMP_EN_UVW = self._PHASE_CMP_EN_UVW(self, Access.RW, 0x00100000, 20, signed=False) - self.PHASE_CMP_EN_Y2 = self._PHASE_CMP_EN_Y2(self, Access.RW, 0x00200000, 21, signed=False) - self.CHARGEPUMP_EN = self._CHARGEPUMP_EN(self, Access.RW, 0x01000000, 24, signed=False) - self.BIAS_EN = self._BIAS_EN(self, Access.RW, 0x02000000, 25, signed=False) - self.HS_AS_LS_Y2 = self._HS_AS_LS_Y2(self, Access.RW, 0x10000000, 28, signed=False) - self.HIGHZ_ON_IDLE = self._HIGHZ_ON_IDLE(self, Access.RW, 0x20000000, 29, signed=False) + self.VS_UVLO_CMP_EN = self._VS_UVLO_CMP_EN( self, Access.RW, 0x00000080, 7, signed=False) + self.BST_ILIM_MAX = self._BST_ILIM_MAX( self, Access.RW, 0x00000700, 8, signed=False) + self.BST_SW_CP_EN = self._BST_SW_CP_EN( self, Access.RW, 0x00000800, 11, signed=False) + self.CHARGEPUMP_EN = self._CHARGEPUMP_EN( self, Access.RW, 0x01000000, 24, signed=False) + self.BIAS_EN = self._BIAS_EN( self, Access.RW, 0x02000000, 25, signed=False) + self.HS_AS_LS_Y2 = self._HS_AS_LS_Y2( self, Access.RW, 0x10000000, 28, signed=False) class _GDRV_CFG(Register): class _IGATE_SINK_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SINK_50MA = Choice(0, parent) + self.SINK_100MA = Choice(1, parent) + self.SINK_160MA = Choice(2, parent) + self.SINK_210MA = Choice(3, parent) + self.SINK_270MA = Choice(4, parent) + self.SINK_320MA = Choice(5, parent) + self.SINK_380MA = Choice(6, parent) + self.SINK_430MA = Choice(7, parent) + self.SINK_580MA = Choice(8, parent) + self.SINK_720MA = Choice(9, parent) + self.SINK_860MA = Choice(10, parent) + self.SINK_1000MA = Choice(11, parent) + self.SINK_1250MA = Choice(12, parent) + self.SINK_1510MA = Choice(13, parent) + self.SINK_1770MA = Choice(14, parent) + self.SINK_2000MA = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("IGATE_SINK_UVW", parent, access, mask, shift, signed=signed) - self.choice : _IGATE_SINK_UVW_FIELD_CHOICES = { - "SINK_40MA 40 mA": Choice(0, self), - "SINK_80MA 80 mA": Choice(1, self), - "SINK_160MA 160 mA": Choice(2, self), - "SINK_240MA 240 mA": Choice(3, self), - "SINK_320MA 320 mA": Choice(4, self), - "SINK_400MA 400 mA": Choice(5, self), - "SINK_480MA 480 mA": Choice(6, self), - "SINK_560MA 560 mA": Choice(7, self), - "SINK_640MA 640 mA": Choice(8, self), - "SINK_800MA 800 mA": Choice(9, self), - "SINK_960MA 960 mA": Choice(10, self), - "SINK_1120MA 1120 mA": Choice(11, self), - "SINK_1280MA 1280 mA": Choice(12, self), - "SINK_1600MA 1600 mA": Choice(13, self), - "SINK_1920MA 1920 mA": Choice(14, self), - "SINK_2000MA 2000 mA": Choice(15, self), - } + self.choice = self._Choices(self) class _IGATE_SOURCE_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SOURCE_25MA = Choice(0, parent) + self.SOURCE_50MA = Choice(1, parent) + self.SOURCE_80MA = Choice(2, parent) + self.SOURCE_105MA = Choice(3, parent) + self.SOURCE_135MA = Choice(4, parent) + self.SOURCE_160MA = Choice(5, parent) + self.SOURCE_190MA = Choice(6, parent) + self.SOURCE_215MA = Choice(7, parent) + self.SOURCE_290MA = Choice(8, parent) + self.SOURCE_360MA = Choice(9, parent) + self.SOURCE_430MA = Choice(10, parent) + self.SOURCE_500MA = Choice(11, parent) + self.SOURCE_625MA = Choice(12, parent) + self.SOURCE_755MA = Choice(13, parent) + self.SOURCE_885MA = Choice(14, parent) + self.SOURCE_1000MA = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("IGATE_SOURCE_UVW", parent, access, mask, shift, signed=signed) - self.choice : _IGATE_SOURCE_UVW_FIELD_CHOICES = { - "SOURCE_20MA 20 mA": Choice(0, self), - "SOURCE_40MA 40 mA": Choice(1, self), - "SOURCE_80MA 80 mA": Choice(2, self), - "SOURCE_120MA 120 mA": Choice(3, self), - "SOURCE_160MA 160 mA": Choice(4, self), - "SOURCE_200MA 200 mA": Choice(5, self), - "SOURCE_240MA 240 mA": Choice(6, self), - "SOURCE_280MA 280mA": Choice(7, self), - "SOURCE_320MA 320 mA": Choice(8, self), - "SOURCE_400MA 400 mA": Choice(9, self), - "SOURCE_480MA 480 mA": Choice(10, self), - "SOURCE_560MA 560 mA": Choice(11, self), - "SOURCE_640MA 640 mA": Choice(12, self), - "SOURCE_800MA 800 mA": Choice(13, self), - "SOURCE_960MA 960 mA": Choice(14, self), - "SOURCE_1000MA 1000mA": Choice(15, self), - } + self.choice = self._Choices(self) class _IGATE_SINK_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SINK_50MA = Choice(0, parent) + self.SINK_100MA = Choice(1, parent) + self.SINK_160MA = Choice(2, parent) + self.SINK_210MA = Choice(3, parent) + self.SINK_270MA = Choice(4, parent) + self.SINK_320MA = Choice(5, parent) + self.SINK_380MA = Choice(6, parent) + self.SINK_430MA = Choice(7, parent) + self.SINK_580MA = Choice(8, parent) + self.SINK_720MA = Choice(9, parent) + self.SINK_860MA = Choice(10, parent) + self.SINK_1000MA = Choice(11, parent) + self.SINK_1250MA = Choice(12, parent) + self.SINK_1510MA = Choice(13, parent) + self.SINK_1770MA = Choice(14, parent) + self.SINK_2000MA = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("IGATE_SINK_Y2", parent, access, mask, shift, signed=signed) - self.choice : _IGATE_SINK_Y2_FIELD_CHOICES = { - "SINK_40MA 40 mA": Choice(0, self), - "SINK_80MA 80 mA": Choice(1, self), - "SINK_160MA 160 mA": Choice(2, self), - "SINK_240MA 240 mA": Choice(3, self), - "SINK_320MA 320 mA": Choice(4, self), - "SINK_400MA 400 mA": Choice(5, self), - "SINK_480MA 480 mA": Choice(6, self), - "SINK_560MA 560 mA": Choice(7, self), - "SINK_640MA 640 mA": Choice(8, self), - "SINK_800MA 800 mA": Choice(9, self), - "SINK_960MA 960 mA": Choice(10, self), - "SINK_1120MA 1120 mA": Choice(11, self), - "SINK_1280MA 1280 mA": Choice(12, self), - "SINK_1600MA 1600 mA": Choice(13, self), - "SINK_1920MA 1920 mA": Choice(14, self), - "SINK_2000MA 2000 mA": Choice(15, self), - } + self.choice = self._Choices(self) class _IGATE_SOURCE_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.SOURCE_25MA = Choice(0, parent) + self.SOURCE_50MA = Choice(1, parent) + self.SOURCE_80MA = Choice(2, parent) + self.SOURCE_105MA = Choice(3, parent) + self.SOURCE_135MA = Choice(4, parent) + self.SOURCE_160MA = Choice(5, parent) + self.SOURCE_190MA = Choice(6, parent) + self.SOURCE_215MA = Choice(7, parent) + self.SOURCE_290MA = Choice(8, parent) + self.SOURCE_360MA = Choice(9, parent) + self.SOURCE_430MA = Choice(10, parent) + self.SOURCE_500MA = Choice(11, parent) + self.SOURCE_625MA = Choice(12, parent) + self.SOURCE_755MA = Choice(13, parent) + self.SOURCE_885MA = Choice(14, parent) + self.SOURCE_1000MA = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("IGATE_SOURCE_Y2", parent, access, mask, shift, signed=signed) - self.choice : _IGATE_SOURCE_Y2_FIELD_CHOICES = { - "SOURCE_20MA 20 mA": Choice(0, self), - "SOURCE_40MA 40 mA": Choice(1, self), - "SOURCE_80MA 80 mA": Choice(2, self), - "SOURCE_120MA 120 mA": Choice(3, self), - "SOURCE_160MA 160 mA": Choice(4, self), - "SOURCE_200MA 200 mA": Choice(5, self), - "SOURCE_240MA 240 mA": Choice(6, self), - "SOURCE_280MA 280mA": Choice(7, self), - "SOURCE_320MA 320 mA": Choice(8, self), - "SOURCE_400MA 400 mA": Choice(9, self), - "SOURCE_480MA 480 mA": Choice(10, self), - "SOURCE_560MA 560 mA": Choice(11, self), - "SOURCE_640MA 640 mA": Choice(12, self), - "SOURCE_800MA 800 mA": Choice(13, self), - "SOURCE_960MA 960 mA": Choice(14, self), - "SOURCE_1000MA 1000mA": Choice(15, self), - } + self.choice = self._Choices(self) class _ADAPTIVE_MODE_UVW(Field): @@ -4527,61 +3764,39 @@ def __init__(self, parent, access, mask, shift, signed): class _VS_UVLO_LVL(Field): - def __init__(self, parent, access, mask, shift, signed): - super().__init__("VS_UVLO_LVL", parent, access, mask, shift, signed=signed) - - self.choice : _VS_UVLO_LVL_FIELD_CHOICES = { - "VSUVLO_44 4.4V": Choice(0, self), - "VSUVLO_46 4.6V": Choice(1, self), - "VSUVLO_48 4.8V": Choice(2, self), - "VSUVLO_50 5.0V": Choice(3, self), - "VSUVLO_52 5.2V": Choice(4, self), - "VSUVLO_54 5.4V": Choice(5, self), - "VSUVLO_56 5.6V": Choice(6, self), - "VSUVLO_58 5.8V": Choice(7, self), - "VSUVLO_60 6.0V": Choice(8, self), - "VSUVLO_63 6.3V": Choice(9, self), - "VSUVLO_66 6.6V": Choice(10, self), - "VSUVLO_69 6.9V": Choice(11, self), - "VSUVLO_72 7.2V": Choice(12, self), - "VSUVLO_75 7.5V": Choice(13, self), - "VSUVLO_78 7.8V": Choice(14, self), - "VSUVLO_81 8.1V": Choice(15, self), - } - - class _EXT_LS_POL(Field): + class _Choices: + def __init__(self, parent) -> None: + self.VSUVLO_44 = Choice(0, parent) + self.VSUVLO_46 = Choice(1, parent) + self.VSUVLO_48 = Choice(2, parent) + self.VSUVLO_50 = Choice(3, parent) + self.VSUVLO_52 = Choice(4, parent) + self.VSUVLO_54 = Choice(5, parent) + self.VSUVLO_56 = Choice(6, parent) + self.VSUVLO_58 = Choice(7, parent) + self.VSUVLO_60 = Choice(8, parent) + self.VSUVLO_63 = Choice(9, parent) + self.VSUVLO_66 = Choice(10, parent) + self.VSUVLO_69 = Choice(11, parent) + self.VSUVLO_72 = Choice(12, parent) + self.VSUVLO_75 = Choice(13, parent) + self.VSUVLO_78 = Choice(14, parent) + self.VSUVLO_81 = Choice(15, parent) def __init__(self, parent, access, mask, shift, signed): - super().__init__("EXT_LS_POL", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _EXT_HS_POL(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("EXT_HS_POL", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _EXT_MODE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("EXT_MODE", parent, access, mask, shift, signed=signed) + super().__init__("VS_UVLO_LVL", parent, access, mask, shift, signed=signed) - self.choice = None + self.choice = self._Choices(self) def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_CFG", parent, access, address, block, signed) - self.IGATE_SINK_UVW = self._IGATE_SINK_UVW(self, Access.RW, 0x0000000F, 0, signed=False) - self.IGATE_SOURCE_UVW = self._IGATE_SOURCE_UVW(self, Access.RW, 0x000000F0, 4, signed=False) - self.IGATE_SINK_Y2 = self._IGATE_SINK_Y2(self, Access.RW, 0x00000F00, 8, signed=False) - self.IGATE_SOURCE_Y2 = self._IGATE_SOURCE_Y2(self, Access.RW, 0x0000F000, 12, signed=False) + self.IGATE_SINK_UVW = self._IGATE_SINK_UVW( self, Access.RW, 0x0000000F, 0, signed=False) + self.IGATE_SOURCE_UVW = self._IGATE_SOURCE_UVW( self, Access.RW, 0x000000F0, 4, signed=False) + self.IGATE_SINK_Y2 = self._IGATE_SINK_Y2( self, Access.RW, 0x00000F00, 8, signed=False) + self.IGATE_SOURCE_Y2 = self._IGATE_SOURCE_Y2( self, Access.RW, 0x0000F000, 12, signed=False) self.ADAPTIVE_MODE_UVW = self._ADAPTIVE_MODE_UVW(self, Access.RW, 0x00010000, 16, signed=False) - self.ADAPTIVE_MODE_Y2 = self._ADAPTIVE_MODE_Y2(self, Access.RW, 0x00020000, 17, signed=False) - self.VS_UVLO_LVL = self._VS_UVLO_LVL(self, Access.RW, 0x00F00000, 20, signed=False) - self.EXT_LS_POL = self._EXT_LS_POL(self, Access.RW, 0x10000000, 28, signed=False) - self.EXT_HS_POL = self._EXT_HS_POL(self, Access.RW, 0x20000000, 29, signed=False) - self.EXT_MODE = self._EXT_MODE(self, Access.RW, 0x40000000, 30, signed=False) + self.ADAPTIVE_MODE_Y2 = self._ADAPTIVE_MODE_Y2( self, Access.RW, 0x00020000, 17, signed=False) + self.VS_UVLO_LVL = self._VS_UVLO_LVL( self, Access.RW, 0x00F00000, 20, signed=False) class _GDRV_TIMING(Register): @@ -4615,10 +3830,10 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_TIMING", parent, access, address, block, signed) - self.T_DRIVE_SINK_UVW = self._T_DRIVE_SINK_UVW(self, Access.RW, 0x000000FF, 0, signed=False) + self.T_DRIVE_SINK_UVW = self._T_DRIVE_SINK_UVW( self, Access.RW, 0x000000FF, 0, signed=False) self.T_DRIVE_SOURCE_UVW = self._T_DRIVE_SOURCE_UVW(self, Access.RW, 0x0000FF00, 8, signed=False) - self.T_DRIVE_SINK_Y2 = self._T_DRIVE_SINK_Y2(self, Access.RW, 0x00FF0000, 16, signed=False) - self.T_DRIVE_SOURCE_Y2 = self._T_DRIVE_SOURCE_Y2(self, Access.RW, 0xFF000000, 24, signed=False) + self.T_DRIVE_SINK_Y2 = self._T_DRIVE_SINK_Y2( self, Access.RW, 0x00FF0000, 16, signed=False) + self.T_DRIVE_SOURCE_Y2 = self._T_DRIVE_SOURCE_Y2( self, Access.RW, 0xFF000000, 24, signed=False) class _GDRV_BBM(Register): @@ -4654,114 +3869,130 @@ def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_BBM", parent, access, address, block, signed) self.BBM_L_UVW = self._BBM_L_UVW(self, Access.RW, 0x000000FF, 0, signed=False) self.BBM_H_UVW = self._BBM_H_UVW(self, Access.RW, 0x0000FF00, 8, signed=False) - self.BBM_L_Y2 = self._BBM_L_Y2(self, Access.RW, 0x00FF0000, 16, signed=False) - self.BBM_H_Y2 = self._BBM_H_Y2(self, Access.RW, 0xFF000000, 24, signed=False) + self.BBM_L_Y2 = self._BBM_L_Y2( self, Access.RW, 0x00FF0000, 16, signed=False) + self.BBM_H_Y2 = self._BBM_H_Y2( self, Access.RW, 0xFF000000, 24, signed=False) class _GDRV_PROT(Register): class _VGS_DEGLITCH_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VGS_DEGLITCH_UVW", parent, access, mask, shift, signed=signed) - self.choice : _VGS_DEGLITCH_UVW_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _VGS_BLANKING_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VGS_BLANKING_UVW", parent, access, mask, shift, signed=signed) - self.choice : _VGS_BLANKING_UVW_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - } + self.choice = self._Choices(self) class _VGS_DEGLITCH_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VGS_DEGLITCH_Y2", parent, access, mask, shift, signed=signed) - self.choice : _VGS_DEGLITCH_Y2_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _VGS_BLANKING_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("VGS_BLANKING_Y2", parent, access, mask, shift, signed=signed) - self.choice : _VGS_BLANKING_Y2_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - } + self.choice = self._Choices(self) class _LS_RETRIES_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.OFF = Choice(0, parent) + self.ONE = Choice(1, parent) + self.TWO = Choice(2, parent) + self.THREE = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_RETRIES_UVW", parent, access, mask, shift, signed=signed) - self.choice : _LS_RETRIES_UVW_FIELD_CHOICES = { - "OFF No Retries": Choice(0, self), - "ONE 1 Retry": Choice(1, self), - "TWO 2 Retries": Choice(2, self), - "THREE 3 Retries": Choice(3, self), - } + self.choice = self._Choices(self) class _HS_RETRIES_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.OFF = Choice(0, parent) + self.ONE = Choice(1, parent) + self.TWO = Choice(2, parent) + self.THREE = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_RETRIES_UVW", parent, access, mask, shift, signed=signed) - self.choice : _HS_RETRIES_UVW_FIELD_CHOICES = { - "OFF No Retries": Choice(0, self), - "ONE 1 Retry": Choice(1, self), - "TWO 2 Retries": Choice(2, self), - "THREE 3 Retries": Choice(3, self), - } + self.choice = self._Choices(self) class _LS_RETRIES_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.OFF = Choice(0, parent) + self.ONE = Choice(1, parent) + self.TWO = Choice(2, parent) + self.THREE = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_RETRIES_Y2", parent, access, mask, shift, signed=signed) - self.choice : _LS_RETRIES_Y2_FIELD_CHOICES = { - "OFF No Retries": Choice(0, self), - "ONE 1 Retry": Choice(1, self), - "TWO 2 Retries": Choice(2, self), - "THREE 3 Retries": Choice(3, self), - } + self.choice = self._Choices(self) class _HS_RETRIES_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.OFF = Choice(0, parent) + self.ONE = Choice(1, parent) + self.TWO = Choice(2, parent) + self.THREE = Choice(3, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_RETRIES_Y2", parent, access, mask, shift, signed=signed) - self.choice : _HS_RETRIES_Y2_FIELD_CHOICES = { - "OFF No Retries": Choice(0, self), - "ONE 1 Retry": Choice(1, self), - "TWO 2 Retries": Choice(2, self), - "THREE 3 Retries": Choice(3, self), - } + self.choice = self._Choices(self) class _TERM_PWM_ON_SHORT(Field): @@ -4772,73 +4003,79 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_PROT", parent, access, address, block, signed) - self.VGS_DEGLITCH_UVW = self._VGS_DEGLITCH_UVW(self, Access.RW, 0x00000007, 0, signed=False) - self.VGS_BLANKING_UVW = self._VGS_BLANKING_UVW(self, Access.RW, 0x00000030, 4, signed=False) - self.VGS_DEGLITCH_Y2 = self._VGS_DEGLITCH_Y2(self, Access.RW, 0x00000700, 8, signed=False) - self.VGS_BLANKING_Y2 = self._VGS_BLANKING_Y2(self, Access.RW, 0x00003000, 12, signed=False) - self.LS_RETRIES_UVW = self._LS_RETRIES_UVW(self, Access.RW, 0x00030000, 16, signed=False) - self.HS_RETRIES_UVW = self._HS_RETRIES_UVW(self, Access.RW, 0x000C0000, 18, signed=False) - self.LS_RETRIES_Y2 = self._LS_RETRIES_Y2(self, Access.RW, 0x00300000, 20, signed=False) - self.HS_RETRIES_Y2 = self._HS_RETRIES_Y2(self, Access.RW, 0x00C00000, 22, signed=False) + self.VGS_DEGLITCH_UVW = self._VGS_DEGLITCH_UVW( self, Access.RW, 0x00000007, 0, signed=False) + self.VGS_BLANKING_UVW = self._VGS_BLANKING_UVW( self, Access.RW, 0x00000030, 4, signed=False) + self.VGS_DEGLITCH_Y2 = self._VGS_DEGLITCH_Y2( self, Access.RW, 0x00000700, 8, signed=False) + self.VGS_BLANKING_Y2 = self._VGS_BLANKING_Y2( self, Access.RW, 0x00003000, 12, signed=False) + self.LS_RETRIES_UVW = self._LS_RETRIES_UVW( self, Access.RW, 0x00030000, 16, signed=False) + self.HS_RETRIES_UVW = self._HS_RETRIES_UVW( self, Access.RW, 0x000C0000, 18, signed=False) + self.LS_RETRIES_Y2 = self._LS_RETRIES_Y2( self, Access.RW, 0x00300000, 20, signed=False) + self.HS_RETRIES_Y2 = self._HS_RETRIES_Y2( self, Access.RW, 0x00C00000, 22, signed=False) self.TERM_PWM_ON_SHORT = self._TERM_PWM_ON_SHORT(self, Access.RW, 0x10000000, 28, signed=False) class _GDRV_OCP_UVW(Register): class _LS_OCP_DEGLITCH_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_DEGLITCH_UVW", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_DEGLITCH_UVW_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _LS_OCP_BLANKING_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + self.BLK_2000NS = Choice(4, parent) + self.BLK_4000NS = Choice(5, parent) + self.BLK_6000NS = Choice(6, parent) + self.BLK_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_BLANKING_UVW", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_BLANKING_UVW_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - "BLK_2000NS 2us": Choice(4, self), - "BLK_4000NS 4us": Choice(5, self), - "BLK_6000NS 6us": Choice(6, self), - "BLK_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _LS_OCP_THRES_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.THRES_80_63MV = Choice(0, parent) + self.THRES_165_125MV = Choice(1, parent) + self.THRES_250_187MV = Choice(2, parent) + self.THRES_330_248MV = Choice(3, parent) + self.THRES_415_312MV = Choice(4, parent) + self.THRES_500_374MV = Choice(5, parent) + self.THRES_582_434MV = Choice(6, parent) + self.THRES_660_504MV = Choice(7, parent) + self.THRES_125_705MV = Choice(8, parent) + self.THRES_250_940MV = Choice(9, parent) + self.THRES_375_1180MV = Choice(10, parent) + self.THRES_500_1410MV = Choice(11, parent) + self.THRES_625_1650MV = Choice(12, parent) + self.THRES_750_1880MV = Choice(13, parent) + self.THRES_873_2110MV = Choice(14, parent) + self.THRES_1000_2350MV = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_THRES_UVW", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_THRES_UVW_FIELD_CHOICES = { - "82mv 63mv": Choice(0, self), - "166mv 125mv": Choice(1, self), - "248mv 187mv": Choice(2, self), - "330mv 248mv": Choice(3, self), - "414mv 312mv": Choice(4, self), - "498mv 374mv": Choice(5, self), - "582mv 434mv": Choice(6, self), - "660mv 504mv": Choice(7, self), - "123mv 705mv": Choice(8, self), - "249mv 940mv": Choice(9, self), - "372mv 1180mv": Choice(10, self), - "495mv 1410mv": Choice(11, self), - "621mv 1650mv": Choice(12, self), - "747mv 1880mv": Choice(13, self), - "873mv 2110mv": Choice(14, self), - "990mv 2350mv": Choice(15, self), - } + self.choice = self._Choices(self) class _LS_OCP_USE_VDS_UVW(Field): @@ -4849,35 +4086,39 @@ def __init__(self, parent, access, mask, shift, signed): class _HS_OCP_DEGLITCH_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_OCP_DEGLITCH_UVW", parent, access, mask, shift, signed=signed) - self.choice : _HS_OCP_DEGLITCH_UVW_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _HS_OCP_BLANKING_UVW(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + self.BLK_2000NS = Choice(4, parent) + self.BLK_4000NS = Choice(5, parent) + self.BLK_6000NS = Choice(6, parent) + self.BLK_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_OCP_BLANKING_UVW", parent, access, mask, shift, signed=signed) - self.choice : _HS_OCP_BLANKING_UVW_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - "BLK_2000NS 2us": Choice(4, self), - "BLK_4000NS 4us": Choice(5, self), - "BLK_6000NS 6us": Choice(6, self), - "BLK_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _HS_OCP_THRES_UVW(Field): @@ -4890,69 +4131,75 @@ def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_OCP_UVW", parent, access, address, block, signed) self.LS_OCP_DEGLITCH_UVW = self._LS_OCP_DEGLITCH_UVW(self, Access.RW, 0x00000007, 0, signed=False) self.LS_OCP_BLANKING_UVW = self._LS_OCP_BLANKING_UVW(self, Access.RW, 0x00000070, 4, signed=False) - self.LS_OCP_THRES_UVW = self._LS_OCP_THRES_UVW(self, Access.RW, 0x00000F00, 8, signed=False) - self.LS_OCP_USE_VDS_UVW = self._LS_OCP_USE_VDS_UVW(self, Access.RW, 0x00008000, 15, signed=False) + self.LS_OCP_THRES_UVW = self._LS_OCP_THRES_UVW( self, Access.RW, 0x00000F00, 8, signed=False) + self.LS_OCP_USE_VDS_UVW = self._LS_OCP_USE_VDS_UVW( self, Access.RW, 0x00008000, 15, signed=False) self.HS_OCP_DEGLITCH_UVW = self._HS_OCP_DEGLITCH_UVW(self, Access.RW, 0x00070000, 16, signed=False) self.HS_OCP_BLANKING_UVW = self._HS_OCP_BLANKING_UVW(self, Access.RW, 0x00700000, 20, signed=False) - self.HS_OCP_THRES_UVW = self._HS_OCP_THRES_UVW(self, Access.RW, 0x0F000000, 24, signed=False) + self.HS_OCP_THRES_UVW = self._HS_OCP_THRES_UVW( self, Access.RW, 0x0F000000, 24, signed=False) class _GDRV_OCP_Y2(Register): class _LS_OCP_DEGLITCH_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_DEGLITCH_Y2", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_DEGLITCH_Y2_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _LS_OCP_BLANKING_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + self.BLK_2000NS = Choice(4, parent) + self.BLK_4000NS = Choice(5, parent) + self.BLK_6000NS = Choice(6, parent) + self.BLK_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_BLANKING_Y2", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_BLANKING_Y2_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - "BLK_2000NS 2us": Choice(4, self), - "BLK_4000NS 4us": Choice(5, self), - "BLK_6000NS 6us": Choice(6, self), - "BLK_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _LS_OCP_THRES_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.THRES_80_63MV = Choice(0, parent) + self.THRES_165_125MV = Choice(1, parent) + self.THRES_250_187MV = Choice(2, parent) + self.THRES_330_248MV = Choice(3, parent) + self.THRES_415_312MV = Choice(4, parent) + self.THRES_500_374MV = Choice(5, parent) + self.THRES_582_434MV = Choice(6, parent) + self.THRES_660_504MV = Choice(7, parent) + self.THRES_125_705MV = Choice(8, parent) + self.THRES_250_940MV = Choice(9, parent) + self.THRES_375_1180MV = Choice(10, parent) + self.THRES_500_1410MV = Choice(11, parent) + self.THRES_625_1650MV = Choice(12, parent) + self.THRES_750_1880MV = Choice(13, parent) + self.THRES_873_2110MV = Choice(14, parent) + self.THRES_1000_2350MV = Choice(15, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("LS_OCP_THRES_Y2", parent, access, mask, shift, signed=signed) - self.choice : _LS_OCP_THRES_Y2_FIELD_CHOICES = { - "82mv 63mv": Choice(0, self), - "166mv 125mv": Choice(1, self), - "248mv 187mv": Choice(2, self), - "330mv 248mv": Choice(3, self), - "414mv 312mv": Choice(4, self), - "498mv 374mv": Choice(5, self), - "582mv 434mv": Choice(6, self), - "660mv 504mv": Choice(7, self), - "123mv 705mv": Choice(8, self), - "249mv 940mv": Choice(9, self), - "372mv 1180mv": Choice(10, self), - "495mv 1410mv": Choice(11, self), - "621mv 1650mv": Choice(12, self), - "747mv 1880mv": Choice(13, self), - "873mv 2110mv": Choice(14, self), - "990mv 2350mv": Choice(15, self), - } + self.choice = self._Choices(self) class _LS_OCP_USE_VDS_Y2(Field): @@ -4963,35 +4210,39 @@ def __init__(self, parent, access, mask, shift, signed): class _HS_OCP_DEGLITCH_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.DEG_OFF = Choice(0, parent) + self.DEG_250NS = Choice(1, parent) + self.DEG_500NS = Choice(2, parent) + self.DEG_1000NS = Choice(3, parent) + self.DEG_2000NS = Choice(4, parent) + self.DEG_4000NS = Choice(5, parent) + self.DEG_6000NS = Choice(6, parent) + self.DEG_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_OCP_DEGLITCH_Y2", parent, access, mask, shift, signed=signed) - self.choice : _HS_OCP_DEGLITCH_Y2_FIELD_CHOICES = { - "DEG_OFF off": Choice(0, self), - "DEG_250NS 0.25us": Choice(1, self), - "DEG_500NS 0.5us": Choice(2, self), - "DEG_1000NS 1us": Choice(3, self), - "DEG_2000NS 2us": Choice(4, self), - "DEG_4000NS 4us": Choice(5, self), - "DEG_6000NS 6us": Choice(6, self), - "DEG_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _HS_OCP_BLANKING_Y2(Field): + class _Choices: + def __init__(self, parent) -> None: + self.BLK_OFF = Choice(0, parent) + self.BLK_250NS = Choice(1, parent) + self.BLK_500NS = Choice(2, parent) + self.BLK_1000NS = Choice(3, parent) + self.BLK_2000NS = Choice(4, parent) + self.BLK_4000NS = Choice(5, parent) + self.BLK_6000NS = Choice(6, parent) + self.BLK_8000NS = Choice(7, parent) + def __init__(self, parent, access, mask, shift, signed): super().__init__("HS_OCP_BLANKING_Y2", parent, access, mask, shift, signed=signed) - self.choice : _HS_OCP_BLANKING_Y2_FIELD_CHOICES = { - "BLK_OFF off": Choice(0, self), - "BLK_250NS 0.25us": Choice(1, self), - "BLK_500NS 0.5us": Choice(2, self), - "BLK_1000NS 1us": Choice(3, self), - "BLK_2000NS 2us": Choice(4, self), - "BLK_4000NS 4us": Choice(5, self), - "BLK_6000NS 6us": Choice(6, self), - "BLK_8000NS 8us": Choice(7, self), - } + self.choice = self._Choices(self) class _HS_OCP_THRES_Y2(Field): @@ -5004,11 +4255,11 @@ def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_OCP_Y2", parent, access, address, block, signed) self.LS_OCP_DEGLITCH_Y2 = self._LS_OCP_DEGLITCH_Y2(self, Access.RW, 0x00000007, 0, signed=False) self.LS_OCP_BLANKING_Y2 = self._LS_OCP_BLANKING_Y2(self, Access.RW, 0x00000070, 4, signed=False) - self.LS_OCP_THRES_Y2 = self._LS_OCP_THRES_Y2(self, Access.RW, 0x00000F00, 8, signed=False) - self.LS_OCP_USE_VDS_Y2 = self._LS_OCP_USE_VDS_Y2(self, Access.RW, 0x00008000, 15, signed=False) + self.LS_OCP_THRES_Y2 = self._LS_OCP_THRES_Y2( self, Access.RW, 0x00000F00, 8, signed=False) + self.LS_OCP_USE_VDS_Y2 = self._LS_OCP_USE_VDS_Y2( self, Access.RW, 0x00008000, 15, signed=False) self.HS_OCP_DEGLITCH_Y2 = self._HS_OCP_DEGLITCH_Y2(self, Access.RW, 0x00070000, 16, signed=False) self.HS_OCP_BLANKING_Y2 = self._HS_OCP_BLANKING_Y2(self, Access.RW, 0x00700000, 20, signed=False) - self.HS_OCP_THRES_Y2 = self._HS_OCP_THRES_Y2(self, Access.RW, 0x0F000000, 24, signed=False) + self.HS_OCP_THRES_Y2 = self._HS_OCP_THRES_Y2( self, Access.RW, 0x0F000000, 24, signed=False) class _GDRV_PROT_EN(Register): @@ -5224,36 +4475,36 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_PROT_EN", parent, access, address, block, signed) - self.LS_SHORT_PROT_U = self._LS_SHORT_PROT_U(self, Access.RW, 0x00000001, 0, signed=False) - self.LS_SHORT_PROT_V = self._LS_SHORT_PROT_V(self, Access.RW, 0x00000002, 1, signed=False) - self.LS_SHORT_PROT_W = self._LS_SHORT_PROT_W(self, Access.RW, 0x00000004, 2, signed=False) - self.LS_SHORT_PROT_Y2 = self._LS_SHORT_PROT_Y2(self, Access.RW, 0x00000008, 3, signed=False) - self.LS_VGS_OFF_SHORT_PROT_U = self._LS_VGS_OFF_SHORT_PROT_U(self, Access.RW, 0x00000010, 4, signed=False) - self.LS_VGS_OFF_SHORT_PROT_V = self._LS_VGS_OFF_SHORT_PROT_V(self, Access.RW, 0x00000020, 5, signed=False) - self.LS_VGS_OFF_SHORT_PROT_W = self._LS_VGS_OFF_SHORT_PROT_W(self, Access.RW, 0x00000040, 6, signed=False) + self.LS_SHORT_PROT_U = self._LS_SHORT_PROT_U( self, Access.RW, 0x00000001, 0, signed=False) + self.LS_SHORT_PROT_V = self._LS_SHORT_PROT_V( self, Access.RW, 0x00000002, 1, signed=False) + self.LS_SHORT_PROT_W = self._LS_SHORT_PROT_W( self, Access.RW, 0x00000004, 2, signed=False) + self.LS_SHORT_PROT_Y2 = self._LS_SHORT_PROT_Y2( self, Access.RW, 0x00000008, 3, signed=False) + self.LS_VGS_OFF_SHORT_PROT_U = self._LS_VGS_OFF_SHORT_PROT_U( self, Access.RW, 0x00000010, 4, signed=False) + self.LS_VGS_OFF_SHORT_PROT_V = self._LS_VGS_OFF_SHORT_PROT_V( self, Access.RW, 0x00000020, 5, signed=False) + self.LS_VGS_OFF_SHORT_PROT_W = self._LS_VGS_OFF_SHORT_PROT_W( self, Access.RW, 0x00000040, 6, signed=False) self.LS_VGS_OFF_SHORT_PROT_Y2 = self._LS_VGS_OFF_SHORT_PROT_Y2(self, Access.RW, 0x00000080, 7, signed=False) - self.LS_VGS_ON_SHORT_PROT_U = self._LS_VGS_ON_SHORT_PROT_U(self, Access.RW, 0x00000100, 8, signed=False) - self.LS_VGS_ON_SHORT_PROT_V = self._LS_VGS_ON_SHORT_PROT_V(self, Access.RW, 0x00000200, 9, signed=False) - self.LS_VGS_ON_SHORT_PROT_W = self._LS_VGS_ON_SHORT_PROT_W(self, Access.RW, 0x00000400, 10, signed=False) - self.LS_VGS_ON_SHORT_PROT_Y2 = self._LS_VGS_ON_SHORT_PROT_Y2(self, Access.RW, 0x00000800, 11, signed=False) - self.BST_UVLO_PROT_U = self._BST_UVLO_PROT_U(self, Access.RW, 0x00001000, 12, signed=False) - self.BST_UVLO_PROT_V = self._BST_UVLO_PROT_V(self, Access.RW, 0x00002000, 13, signed=False) - self.BST_UVLO_PROT_W = self._BST_UVLO_PROT_W(self, Access.RW, 0x00004000, 14, signed=False) - self.BST_UVLO_PROT_Y2 = self._BST_UVLO_PROT_Y2(self, Access.RW, 0x00008000, 15, signed=False) - self.HS_SHORT_PROT_U = self._HS_SHORT_PROT_U(self, Access.RW, 0x00010000, 16, signed=False) - self.HS_SHORT_PROT_V = self._HS_SHORT_PROT_V(self, Access.RW, 0x00020000, 17, signed=False) - self.HS_SHORT_PROT_W = self._HS_SHORT_PROT_W(self, Access.RW, 0x00040000, 18, signed=False) - self.HS_SHORT_PROT_Y2 = self._HS_SHORT_PROT_Y2(self, Access.RW, 0x00080000, 19, signed=False) - self.HS_VGS_OFF_SHORT_PROT_U = self._HS_VGS_OFF_SHORT_PROT_U(self, Access.RW, 0x00100000, 20, signed=False) - self.HS_VGS_OFF_SHORT_PROT_V = self._HS_VGS_OFF_SHORT_PROT_V(self, Access.RW, 0x00200000, 21, signed=False) - self.HS_VGS_OFF_SHORT_PROT_W = self._HS_VGS_OFF_SHORT_PROT_W(self, Access.RW, 0x00400000, 22, signed=False) + self.LS_VGS_ON_SHORT_PROT_U = self._LS_VGS_ON_SHORT_PROT_U( self, Access.RW, 0x00000100, 8, signed=False) + self.LS_VGS_ON_SHORT_PROT_V = self._LS_VGS_ON_SHORT_PROT_V( self, Access.RW, 0x00000200, 9, signed=False) + self.LS_VGS_ON_SHORT_PROT_W = self._LS_VGS_ON_SHORT_PROT_W( self, Access.RW, 0x00000400, 10, signed=False) + self.LS_VGS_ON_SHORT_PROT_Y2 = self._LS_VGS_ON_SHORT_PROT_Y2( self, Access.RW, 0x00000800, 11, signed=False) + self.BST_UVLO_PROT_U = self._BST_UVLO_PROT_U( self, Access.RW, 0x00001000, 12, signed=False) + self.BST_UVLO_PROT_V = self._BST_UVLO_PROT_V( self, Access.RW, 0x00002000, 13, signed=False) + self.BST_UVLO_PROT_W = self._BST_UVLO_PROT_W( self, Access.RW, 0x00004000, 14, signed=False) + self.BST_UVLO_PROT_Y2 = self._BST_UVLO_PROT_Y2( self, Access.RW, 0x00008000, 15, signed=False) + self.HS_SHORT_PROT_U = self._HS_SHORT_PROT_U( self, Access.RW, 0x00010000, 16, signed=False) + self.HS_SHORT_PROT_V = self._HS_SHORT_PROT_V( self, Access.RW, 0x00020000, 17, signed=False) + self.HS_SHORT_PROT_W = self._HS_SHORT_PROT_W( self, Access.RW, 0x00040000, 18, signed=False) + self.HS_SHORT_PROT_Y2 = self._HS_SHORT_PROT_Y2( self, Access.RW, 0x00080000, 19, signed=False) + self.HS_VGS_OFF_SHORT_PROT_U = self._HS_VGS_OFF_SHORT_PROT_U( self, Access.RW, 0x00100000, 20, signed=False) + self.HS_VGS_OFF_SHORT_PROT_V = self._HS_VGS_OFF_SHORT_PROT_V( self, Access.RW, 0x00200000, 21, signed=False) + self.HS_VGS_OFF_SHORT_PROT_W = self._HS_VGS_OFF_SHORT_PROT_W( self, Access.RW, 0x00400000, 22, signed=False) self.HS_VGS_OFF_SHORT_PROT_Y2 = self._HS_VGS_OFF_SHORT_PROT_Y2(self, Access.RW, 0x00800000, 23, signed=False) - self.HS_VGS_ON_SHORT_PROT_U = self._HS_VGS_ON_SHORT_PROT_U(self, Access.RW, 0x01000000, 24, signed=False) - self.HS_VGS_ON_SHORT_PROT_V = self._HS_VGS_ON_SHORT_PROT_V(self, Access.RW, 0x02000000, 25, signed=False) - self.HS_VGS_ON_SHORT_PROT_W = self._HS_VGS_ON_SHORT_PROT_W(self, Access.RW, 0x04000000, 26, signed=False) - self.HS_VGS_ON_SHORT_PROT_Y2 = self._HS_VGS_ON_SHORT_PROT_Y2(self, Access.RW, 0x08000000, 27, signed=False) - self.VDRV_UVLO_PROT = self._VDRV_UVLO_PROT(self, Access.RW, 0x20000000, 29, signed=False) - self.VS_UVLO_PROT = self._VS_UVLO_PROT(self, Access.RW, 0x80000000, 31, signed=False) + self.HS_VGS_ON_SHORT_PROT_U = self._HS_VGS_ON_SHORT_PROT_U( self, Access.RW, 0x01000000, 24, signed=False) + self.HS_VGS_ON_SHORT_PROT_V = self._HS_VGS_ON_SHORT_PROT_V( self, Access.RW, 0x02000000, 25, signed=False) + self.HS_VGS_ON_SHORT_PROT_W = self._HS_VGS_ON_SHORT_PROT_W( self, Access.RW, 0x04000000, 26, signed=False) + self.HS_VGS_ON_SHORT_PROT_Y2 = self._HS_VGS_ON_SHORT_PROT_Y2( self, Access.RW, 0x08000000, 27, signed=False) + self.VDRV_UVLO_PROT = self._VDRV_UVLO_PROT( self, Access.RW, 0x20000000, 29, signed=False) + self.VS_UVLO_PROT = self._VS_UVLO_PROT( self, Access.RW, 0x80000000, 31, signed=False) class _GDRV_STATUS_EN(Register): @@ -5476,37 +4727,37 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_STATUS_EN", parent, access, address, block, signed) - self.LS_SHORT_EN_U = self._LS_SHORT_EN_U(self, Access.RW, 0x00000001, 0, signed=False) - self.LS_SHORT_EN_V = self._LS_SHORT_EN_V(self, Access.RW, 0x00000002, 1, signed=False) - self.LS_SHORT_EN_W = self._LS_SHORT_EN_W(self, Access.RW, 0x00000004, 2, signed=False) - self.LS_SHORT_EN_Y2 = self._LS_SHORT_EN_Y2(self, Access.RW, 0x00000008, 3, signed=False) - self.LS_VGS_OFF_SHORT_EN_U = self._LS_VGS_OFF_SHORT_EN_U(self, Access.RW, 0x00000010, 4, signed=False) - self.LS_VGS_OFF_SHORT_EN_V = self._LS_VGS_OFF_SHORT_EN_V(self, Access.RW, 0x00000020, 5, signed=False) - self.LS_VGS_OFF_SHORT_EN_W = self._LS_VGS_OFF_SHORT_EN_W(self, Access.RW, 0x00000040, 6, signed=False) + self.LS_SHORT_EN_U = self._LS_SHORT_EN_U( self, Access.RW, 0x00000001, 0, signed=False) + self.LS_SHORT_EN_V = self._LS_SHORT_EN_V( self, Access.RW, 0x00000002, 1, signed=False) + self.LS_SHORT_EN_W = self._LS_SHORT_EN_W( self, Access.RW, 0x00000004, 2, signed=False) + self.LS_SHORT_EN_Y2 = self._LS_SHORT_EN_Y2( self, Access.RW, 0x00000008, 3, signed=False) + self.LS_VGS_OFF_SHORT_EN_U = self._LS_VGS_OFF_SHORT_EN_U( self, Access.RW, 0x00000010, 4, signed=False) + self.LS_VGS_OFF_SHORT_EN_V = self._LS_VGS_OFF_SHORT_EN_V( self, Access.RW, 0x00000020, 5, signed=False) + self.LS_VGS_OFF_SHORT_EN_W = self._LS_VGS_OFF_SHORT_EN_W( self, Access.RW, 0x00000040, 6, signed=False) self.LS_VGS_OFF_SHORT_EN_Y2 = self._LS_VGS_OFF_SHORT_EN_Y2(self, Access.RW, 0x00000080, 7, signed=False) - self.LS_VGS_ON_SHORT_EN_U = self._LS_VGS_ON_SHORT_EN_U(self, Access.RW, 0x00000100, 8, signed=False) - self.LS_VGS_ON_SHORT_EN_V = self._LS_VGS_ON_SHORT_EN_V(self, Access.RW, 0x00000200, 9, signed=False) - self.LS_VGS_ON_SHORT_EN_W = self._LS_VGS_ON_SHORT_EN_W(self, Access.RW, 0x00000400, 10, signed=False) - self.LS_VGS_ON_SHORT_EN_Y2 = self._LS_VGS_ON_SHORT_EN_Y2(self, Access.RW, 0x00000800, 11, signed=False) - self.BST_UVLO_EN_U = self._BST_UVLO_EN_U(self, Access.RW, 0x00001000, 12, signed=False) - self.BST_UVLO_EN_V = self._BST_UVLO_EN_V(self, Access.RW, 0x00002000, 13, signed=False) - self.BST_UVLO_EN_W = self._BST_UVLO_EN_W(self, Access.RW, 0x00004000, 14, signed=False) - self.BST_UVLO_EN_Y2 = self._BST_UVLO_EN_Y2(self, Access.RW, 0x00008000, 15, signed=False) - self.HS_SHORT_EN_U = self._HS_SHORT_EN_U(self, Access.RW, 0x00010000, 16, signed=False) - self.HS_SHORT_EN_V = self._HS_SHORT_EN_V(self, Access.RW, 0x00020000, 17, signed=False) - self.HS_SHORT_EN_W = self._HS_SHORT_EN_W(self, Access.RW, 0x00040000, 18, signed=False) - self.HS_SHORT_EN_Y2 = self._HS_SHORT_EN_Y2(self, Access.RW, 0x00080000, 19, signed=False) - self.HS_VGS_OFF_SHORT_EN_U = self._HS_VGS_OFF_SHORT_EN_U(self, Access.RW, 0x00100000, 20, signed=False) - self.HS_VGS_OFF_SHORT_EN_V = self._HS_VGS_OFF_SHORT_EN_V(self, Access.RW, 0x00200000, 21, signed=False) - self.HS_VGS_OFF_SHORT_EN_W = self._HS_VGS_OFF_SHORT_EN_W(self, Access.RW, 0x00400000, 22, signed=False) + self.LS_VGS_ON_SHORT_EN_U = self._LS_VGS_ON_SHORT_EN_U( self, Access.RW, 0x00000100, 8, signed=False) + self.LS_VGS_ON_SHORT_EN_V = self._LS_VGS_ON_SHORT_EN_V( self, Access.RW, 0x00000200, 9, signed=False) + self.LS_VGS_ON_SHORT_EN_W = self._LS_VGS_ON_SHORT_EN_W( self, Access.RW, 0x00000400, 10, signed=False) + self.LS_VGS_ON_SHORT_EN_Y2 = self._LS_VGS_ON_SHORT_EN_Y2( self, Access.RW, 0x00000800, 11, signed=False) + self.BST_UVLO_EN_U = self._BST_UVLO_EN_U( self, Access.RW, 0x00001000, 12, signed=False) + self.BST_UVLO_EN_V = self._BST_UVLO_EN_V( self, Access.RW, 0x00002000, 13, signed=False) + self.BST_UVLO_EN_W = self._BST_UVLO_EN_W( self, Access.RW, 0x00004000, 14, signed=False) + self.BST_UVLO_EN_Y2 = self._BST_UVLO_EN_Y2( self, Access.RW, 0x00008000, 15, signed=False) + self.HS_SHORT_EN_U = self._HS_SHORT_EN_U( self, Access.RW, 0x00010000, 16, signed=False) + self.HS_SHORT_EN_V = self._HS_SHORT_EN_V( self, Access.RW, 0x00020000, 17, signed=False) + self.HS_SHORT_EN_W = self._HS_SHORT_EN_W( self, Access.RW, 0x00040000, 18, signed=False) + self.HS_SHORT_EN_Y2 = self._HS_SHORT_EN_Y2( self, Access.RW, 0x00080000, 19, signed=False) + self.HS_VGS_OFF_SHORT_EN_U = self._HS_VGS_OFF_SHORT_EN_U( self, Access.RW, 0x00100000, 20, signed=False) + self.HS_VGS_OFF_SHORT_EN_V = self._HS_VGS_OFF_SHORT_EN_V( self, Access.RW, 0x00200000, 21, signed=False) + self.HS_VGS_OFF_SHORT_EN_W = self._HS_VGS_OFF_SHORT_EN_W( self, Access.RW, 0x00400000, 22, signed=False) self.HS_VGS_OFF_SHORT_EN_Y2 = self._HS_VGS_OFF_SHORT_EN_Y2(self, Access.RW, 0x00800000, 23, signed=False) - self.HS_VGS_ON_SHORT_EN_U = self._HS_VGS_ON_SHORT_EN_U(self, Access.RW, 0x01000000, 24, signed=False) - self.HS_VGS_ON_SHORT_EN_V = self._HS_VGS_ON_SHORT_EN_V(self, Access.RW, 0x02000000, 25, signed=False) - self.HS_VGS_ON_SHORT_EN_W = self._HS_VGS_ON_SHORT_EN_W(self, Access.RW, 0x04000000, 26, signed=False) - self.HS_VGS_ON_SHORT_EN_Y2 = self._HS_VGS_ON_SHORT_EN_Y2(self, Access.RW, 0x08000000, 27, signed=False) - self.VDRV_UVLO_EN = self._VDRV_UVLO_EN(self, Access.RW, 0x20000000, 29, signed=False) - self.VDRV_UVLWRN_EN = self._VDRV_UVLWRN_EN(self, Access.RW, 0x40000000, 30, signed=False) - self.VS_UVLO_EN = self._VS_UVLO_EN(self, Access.RW, 0x80000000, 31, signed=False) + self.HS_VGS_ON_SHORT_EN_U = self._HS_VGS_ON_SHORT_EN_U( self, Access.RW, 0x01000000, 24, signed=False) + self.HS_VGS_ON_SHORT_EN_V = self._HS_VGS_ON_SHORT_EN_V( self, Access.RW, 0x02000000, 25, signed=False) + self.HS_VGS_ON_SHORT_EN_W = self._HS_VGS_ON_SHORT_EN_W( self, Access.RW, 0x04000000, 26, signed=False) + self.HS_VGS_ON_SHORT_EN_Y2 = self._HS_VGS_ON_SHORT_EN_Y2( self, Access.RW, 0x08000000, 27, signed=False) + self.VDRV_UVLO_EN = self._VDRV_UVLO_EN( self, Access.RW, 0x20000000, 29, signed=False) + self.VDRV_UVLWRN_EN = self._VDRV_UVLWRN_EN( self, Access.RW, 0x40000000, 30, signed=False) + self.VS_UVLO_EN = self._VS_UVLO_EN( self, Access.RW, 0x80000000, 31, signed=False) class _GDRV_STATUS(Register): @@ -5729,37 +4980,37 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_STATUS", parent, access, address, block, signed) - self.LS_SHORT_U = self._LS_SHORT_U(self, Access.RWC, 0x00000001, 0, signed=False) - self.LS_SHORT_V = self._LS_SHORT_V(self, Access.RWC, 0x00000002, 1, signed=False) - self.LS_SHORT_W = self._LS_SHORT_W(self, Access.RWC, 0x00000004, 2, signed=False) - self.LS_SHORT_Y2 = self._LS_SHORT_Y2(self, Access.RWC, 0x00000008, 3, signed=False) - self.LS_VGS_OFF_SHORT_U = self._LS_VGS_OFF_SHORT_U(self, Access.RWC, 0x00000010, 4, signed=False) - self.LS_VGS_OFF_SHORT_V = self._LS_VGS_OFF_SHORT_V(self, Access.RWC, 0x00000020, 5, signed=False) - self.LS_VGS_OFF_SHORT_W = self._LS_VGS_OFF_SHORT_W(self, Access.RWC, 0x00000040, 6, signed=False) + self.LS_SHORT_U = self._LS_SHORT_U( self, Access.RWC, 0x00000001, 0, signed=False) + self.LS_SHORT_V = self._LS_SHORT_V( self, Access.RWC, 0x00000002, 1, signed=False) + self.LS_SHORT_W = self._LS_SHORT_W( self, Access.RWC, 0x00000004, 2, signed=False) + self.LS_SHORT_Y2 = self._LS_SHORT_Y2( self, Access.RWC, 0x00000008, 3, signed=False) + self.LS_VGS_OFF_SHORT_U = self._LS_VGS_OFF_SHORT_U( self, Access.RWC, 0x00000010, 4, signed=False) + self.LS_VGS_OFF_SHORT_V = self._LS_VGS_OFF_SHORT_V( self, Access.RWC, 0x00000020, 5, signed=False) + self.LS_VGS_OFF_SHORT_W = self._LS_VGS_OFF_SHORT_W( self, Access.RWC, 0x00000040, 6, signed=False) self.LS_VGS_OFF_SHORT_Y2 = self._LS_VGS_OFF_SHORT_Y2(self, Access.RWC, 0x00000080, 7, signed=False) - self.LS_VGS_ON_SHORT_U = self._LS_VGS_ON_SHORT_U(self, Access.RWC, 0x00000100, 8, signed=False) - self.LS_VGS_ON_SHORT_V = self._LS_VGS_ON_SHORT_V(self, Access.RWC, 0x00000200, 9, signed=False) - self.LS_VGS_ON_SHORT_W = self._LS_VGS_ON_SHORT_W(self, Access.RWC, 0x00000400, 10, signed=False) - self.LS_VGS_ON_SHORT_Y2 = self._LS_VGS_ON_SHORT_Y2(self, Access.RWC, 0x00000800, 11, signed=False) - self.BST_UVLO_U = self._BST_UVLO_U(self, Access.RWC, 0x00001000, 12, signed=False) - self.BST_UVLO_V = self._BST_UVLO_V(self, Access.RWC, 0x00002000, 13, signed=False) - self.BST_UVLO_W = self._BST_UVLO_W(self, Access.RWC, 0x00004000, 14, signed=False) - self.BST_UVLO_Y2 = self._BST_UVLO_Y2(self, Access.RWC, 0x00008000, 15, signed=False) - self.HS_SHORT_U = self._HS_SHORT_U(self, Access.RWC, 0x00010000, 16, signed=False) - self.HS_SHORT_V = self._HS_SHORT_V(self, Access.RWC, 0x00020000, 17, signed=False) - self.HS_SHORT_W = self._HS_SHORT_W(self, Access.RWC, 0x00040000, 18, signed=False) - self.HS_SHORT_Y2 = self._HS_SHORT_Y2(self, Access.RWC, 0x00080000, 19, signed=False) - self.HS_VGS_OFF_SHORT_U = self._HS_VGS_OFF_SHORT_U(self, Access.RWC, 0x00100000, 20, signed=False) - self.HS_VGS_OFF_SHORT_V = self._HS_VGS_OFF_SHORT_V(self, Access.RWC, 0x00200000, 21, signed=False) - self.HS_VGS_OFF_SHORT_W = self._HS_VGS_OFF_SHORT_W(self, Access.RWC, 0x00400000, 22, signed=False) + self.LS_VGS_ON_SHORT_U = self._LS_VGS_ON_SHORT_U( self, Access.RWC, 0x00000100, 8, signed=False) + self.LS_VGS_ON_SHORT_V = self._LS_VGS_ON_SHORT_V( self, Access.RWC, 0x00000200, 9, signed=False) + self.LS_VGS_ON_SHORT_W = self._LS_VGS_ON_SHORT_W( self, Access.RWC, 0x00000400, 10, signed=False) + self.LS_VGS_ON_SHORT_Y2 = self._LS_VGS_ON_SHORT_Y2( self, Access.RWC, 0x00000800, 11, signed=False) + self.BST_UVLO_U = self._BST_UVLO_U( self, Access.RWC, 0x00001000, 12, signed=False) + self.BST_UVLO_V = self._BST_UVLO_V( self, Access.RWC, 0x00002000, 13, signed=False) + self.BST_UVLO_W = self._BST_UVLO_W( self, Access.RWC, 0x00004000, 14, signed=False) + self.BST_UVLO_Y2 = self._BST_UVLO_Y2( self, Access.RWC, 0x00008000, 15, signed=False) + self.HS_SHORT_U = self._HS_SHORT_U( self, Access.RWC, 0x00010000, 16, signed=False) + self.HS_SHORT_V = self._HS_SHORT_V( self, Access.RWC, 0x00020000, 17, signed=False) + self.HS_SHORT_W = self._HS_SHORT_W( self, Access.RWC, 0x00040000, 18, signed=False) + self.HS_SHORT_Y2 = self._HS_SHORT_Y2( self, Access.RWC, 0x00080000, 19, signed=False) + self.HS_VGS_OFF_SHORT_U = self._HS_VGS_OFF_SHORT_U( self, Access.RWC, 0x00100000, 20, signed=False) + self.HS_VGS_OFF_SHORT_V = self._HS_VGS_OFF_SHORT_V( self, Access.RWC, 0x00200000, 21, signed=False) + self.HS_VGS_OFF_SHORT_W = self._HS_VGS_OFF_SHORT_W( self, Access.RWC, 0x00400000, 22, signed=False) self.HS_VGS_OFF_SHORT_Y2 = self._HS_VGS_OFF_SHORT_Y2(self, Access.RWC, 0x00800000, 23, signed=False) - self.HS_VGS_ON_SHORT_U = self._HS_VGS_ON_SHORT_U(self, Access.RWC, 0x01000000, 24, signed=False) - self.HS_VGS_ON_SHORT_V = self._HS_VGS_ON_SHORT_V(self, Access.RWC, 0x02000000, 25, signed=False) - self.HS_VGS_ON_SHORT_W = self._HS_VGS_ON_SHORT_W(self, Access.RWC, 0x04000000, 26, signed=False) - self.HS_VGS_ON_SHORT_Y2 = self._HS_VGS_ON_SHORT_Y2(self, Access.RWC, 0x08000000, 27, signed=False) - self.VDRV_UVLO = self._VDRV_UVLO(self, Access.RWC, 0x20000000, 29, signed=False) - self.VDRV_UVLWRN = self._VDRV_UVLWRN(self, Access.RWC, 0x40000000, 30, signed=False) - self.VS_UVLO = self._VS_UVLO(self, Access.RWC, 0x80000000, 31, signed=False) + self.HS_VGS_ON_SHORT_U = self._HS_VGS_ON_SHORT_U( self, Access.RWC, 0x01000000, 24, signed=False) + self.HS_VGS_ON_SHORT_V = self._HS_VGS_ON_SHORT_V( self, Access.RWC, 0x02000000, 25, signed=False) + self.HS_VGS_ON_SHORT_W = self._HS_VGS_ON_SHORT_W( self, Access.RWC, 0x04000000, 26, signed=False) + self.HS_VGS_ON_SHORT_Y2 = self._HS_VGS_ON_SHORT_Y2( self, Access.RWC, 0x08000000, 27, signed=False) + self.VDRV_UVLO = self._VDRV_UVLO( self, Access.RWC, 0x20000000, 29, signed=False) + self.VDRV_UVLWRN = self._VDRV_UVLWRN( self, Access.RWC, 0x40000000, 30, signed=False) + self.VS_UVLO = self._VS_UVLO( self, Access.RWC, 0x80000000, 31, signed=False) class _GDRV_FAULT(Register): @@ -5870,21 +5121,21 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("GDRV_FAULT", parent, access, address, block, signed) - self.LS_FAULT_ACTIVE_U = self._LS_FAULT_ACTIVE_U(self, Access.RWC, 0x00000001, 0, signed=False) - self.LS_FAULT_ACTIVE_V = self._LS_FAULT_ACTIVE_V(self, Access.RWC, 0x00000002, 1, signed=False) - self.LS_FAULT_ACTIVE_W = self._LS_FAULT_ACTIVE_W(self, Access.RWC, 0x00000004, 2, signed=False) + self.LS_FAULT_ACTIVE_U = self._LS_FAULT_ACTIVE_U( self, Access.RWC, 0x00000001, 0, signed=False) + self.LS_FAULT_ACTIVE_V = self._LS_FAULT_ACTIVE_V( self, Access.RWC, 0x00000002, 1, signed=False) + self.LS_FAULT_ACTIVE_W = self._LS_FAULT_ACTIVE_W( self, Access.RWC, 0x00000004, 2, signed=False) self.LS_FAULT_ACTIVE_Y2 = self._LS_FAULT_ACTIVE_Y2(self, Access.RWC, 0x00000008, 3, signed=False) - self.BST_UVLO_STS_U = self._BST_UVLO_STS_U(self, Access.R, 0x00001000, 12, signed=False) - self.BST_UVLO_STS_V = self._BST_UVLO_STS_V(self, Access.R, 0x00002000, 13, signed=False) - self.BST_UVLO_STS_W = self._BST_UVLO_STS_W(self, Access.R, 0x00004000, 14, signed=False) - self.BST_UVLO_STS_Y2 = self._BST_UVLO_STS_Y2(self, Access.R, 0x00008000, 15, signed=False) - self.HS_FAULT_ACTIVE_U = self._HS_FAULT_ACTIVE_U(self, Access.RWC, 0x00010000, 16, signed=False) - self.HS_FAULT_ACTIVE_V = self._HS_FAULT_ACTIVE_V(self, Access.RWC, 0x00020000, 17, signed=False) - self.HS_FAULT_ACTIVE_W = self._HS_FAULT_ACTIVE_W(self, Access.RWC, 0x00040000, 18, signed=False) + self.BST_UVLO_STS_U = self._BST_UVLO_STS_U( self, Access.R, 0x00001000, 12, signed=False) + self.BST_UVLO_STS_V = self._BST_UVLO_STS_V( self, Access.R, 0x00002000, 13, signed=False) + self.BST_UVLO_STS_W = self._BST_UVLO_STS_W( self, Access.R, 0x00004000, 14, signed=False) + self.BST_UVLO_STS_Y2 = self._BST_UVLO_STS_Y2( self, Access.R, 0x00008000, 15, signed=False) + self.HS_FAULT_ACTIVE_U = self._HS_FAULT_ACTIVE_U( self, Access.RWC, 0x00010000, 16, signed=False) + self.HS_FAULT_ACTIVE_V = self._HS_FAULT_ACTIVE_V( self, Access.RWC, 0x00020000, 17, signed=False) + self.HS_FAULT_ACTIVE_W = self._HS_FAULT_ACTIVE_W( self, Access.RWC, 0x00040000, 18, signed=False) self.HS_FAULT_ACTIVE_Y2 = self._HS_FAULT_ACTIVE_Y2(self, Access.RWC, 0x00080000, 19, signed=False) - self.VDRV_UVLO_STS = self._VDRV_UVLO_STS(self, Access.R, 0x20000000, 29, signed=False) - self.VDRV_UVLWRN_STS = self._VDRV_UVLWRN_STS(self, Access.R, 0x40000000, 30, signed=False) - self.VS_UVLO_STS = self._VS_UVLO_STS(self, Access.R, 0x80000000, 31, signed=False) + self.VDRV_UVLO_STS = self._VDRV_UVLO_STS( self, Access.R, 0x20000000, 29, signed=False) + self.VDRV_UVLWRN_STS = self._VDRV_UVLWRN_STS( self, Access.R, 0x40000000, 30, signed=False) + self.VS_UVLO_STS = self._VS_UVLO_STS( self, Access.R, 0x80000000, 31, signed=False) class _ADC_I1_I0_EXT(Register): @@ -5960,7 +5211,7 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("PWM_Y2_WY1_EXT", parent, access, address, block, signed) self.WY1 = self._WY1(self, Access.RW, 0x0000FFFF, 0, signed=False) - self.Y2 = self._Y2(self, Access.RW, 0xFFFF0000, 16, signed=False) + self.Y2 = self._Y2( self, Access.RW, 0xFFFF0000, 16, signed=False) class _PWM_EXT_Y2_ALT(Register): @@ -6032,170 +5283,161 @@ def __init__(self, parent, access, address, block, signed): def __init__(self, block=None): super().__init__("ALL_REGISTERS", block) - self.INFO_CHIP = self._INFO_CHIP(self, Access.R, 0x0000, block, False) - self.INFO_VARIANT = self._INFO_VARIANT(self, Access.R, 0x0001, block, False) - self.INFO_REVISION = self._INFO_REVISION(self, Access.R, 0x0002, block, False) - self.INFO_DATE = self._INFO_DATE(self, Access.R, 0x0003, block, False) - self.ADC_I1_I0_RAW = self._ADC_I1_I0_RAW(self, Access.R, 0x0020, block, False) - self.ADC_I3_I2_RAW = self._ADC_I3_I2_RAW(self, Access.R, 0x0021, block, False) - self.ADC_U1_U0_RAW = self._ADC_U1_U0_RAW(self, Access.R, 0x0022, block, False) - self.ADC_U3_U2_RAW = self._ADC_U3_U2_RAW(self, Access.R, 0x0023, block, False) - self.ADC_TEMP_VM_RAW = self._ADC_TEMP_VM_RAW(self, Access.R, 0x0024, block, False) - self.ADC_AIN1_AIN0_RAW = self._ADC_AIN1_AIN0_RAW(self, Access.R, 0x0025, block, False) - self.ADC_AIN3_AIN2_RAW = self._ADC_AIN3_AIN2_RAW(self, Access.R, 0x0026, block, False) - self.ADC_I_GEN_CONFIG = self._ADC_I_GEN_CONFIG(self, Access.RW, 0x0040, block, False) - self.ADC_I0_CONFIG = self._ADC_I0_CONFIG(self, Access.RW, 0x0041, block, False) - self.ADC_I1_CONFIG = self._ADC_I1_CONFIG(self, Access.RW, 0x0042, block, False) - self.ADC_I2_CONFIG = self._ADC_I2_CONFIG(self, Access.RW, 0x0043, block, False) - self.ADC_I3_CONFIG = self._ADC_I3_CONFIG(self, Access.RW, 0x0044, block, False) - self.ADC_I1_I0_SCALED = self._ADC_I1_I0_SCALED(self, Access.R, 0x0045, block, False) - self.ADC_I3_I2_SCALED = self._ADC_I3_I2_SCALED(self, Access.R, 0x0046, block, False) - self.ADC_IWY_IUX = self._ADC_IWY_IUX(self, Access.R, 0x0047, block, False) - self.ADC_IV = self._ADC_IV(self, Access.R, 0x0048, block, True) - self.ADC_STATUS = self._ADC_STATUS(self, Access.RWC, 0x0049, block, False) - self.MOTOR_CONFIG = self._MOTOR_CONFIG(self, Access.RW, 0x0060, block, False) - self.MOTION_CONFIG = self._MOTION_CONFIG(self, Access.RW, 0x0061, block, False) - self.PHI_E_SELECTION = self._PHI_E_SELECTION(self, Access.RW, 0x0062, block, False) - self.PHI_E = self._PHI_E(self, Access.R, 0x0063, block, True) - self.PWM_CONFIG = self._PWM_CONFIG(self, Access.RW, 0x0080, block, False) - self.PWM_MAXCNT = self._PWM_MAXCNT(self, Access.RW, 0x0081, block, False) - self.PWM_SWITCH_LIMIT = self._PWM_SWITCH_LIMIT(self, Access.RW, 0x0083, block, False) - self.PWM_WATCHDOG_CFG = self._PWM_WATCHDOG_CFG(self, Access.RW, 0x0084, block, False) - self.ABN_PHI_E_PHI_M = self._ABN_PHI_E_PHI_M(self, Access.R, 0x00A0, block, False) - self.ABN_MODE = self._ABN_MODE(self, Access.RW, 0x00A1, block, False) - self.ABN_PPR = self._ABN_PPR(self, Access.RW, 0x00A2, block, False) - self.ABN_PPR_INV = self._ABN_PPR_INV(self, Access.RW, 0x00A3, block, False) - self.ABN_COUNT = self._ABN_COUNT(self, Access.RW, 0x00A4, block, False) - self.ABN_COUNT_N = self._ABN_COUNT_N(self, Access.RW, 0x00A5, block, False) - self.ABN_PHI_E_OFFSET = self._ABN_PHI_E_OFFSET(self, Access.RW, 0x00A6, block, True) - self.HALL_MODE = self._HALL_MODE(self, Access.RW, 0x00C0, block, False) - self.HALL_DPHI_MAX = self._HALL_DPHI_MAX(self, Access.RW, 0x00C1, block, False) - self.HALL_PHI_E_OFFSET = self._HALL_PHI_E_OFFSET(self, Access.RW, 0x00C2, block, True) - self.HALL_COUNT = self._HALL_COUNT(self, Access.R, 0x00C3, block, True) - self.HALL_PHI_E_EXTRAPOLATED_PHI_E = self._HALL_PHI_E_EXTRAPOLATED_PHI_E(self, Access.R, 0x00C4, block, False) - self.HALL_POSITION_060_POSITION_000 = self._HALL_POSITION_060_POSITION_000(self, Access.RW, 0x00C5, block, False) - self.HALL_POSITION_180_POSITION_120 = self._HALL_POSITION_180_POSITION_120(self, Access.RW, 0x00C6, block, False) - self.HALL_POSITION_300_POSITION_240 = self._HALL_POSITION_300_POSITION_240(self, Access.RW, 0x00C7, block, False) - self.BIQUAD_V_A_1 = self._BIQUAD_V_A_1(self, Access.RW, 0x00E0, block, True) - self.BIQUAD_V_A_2 = self._BIQUAD_V_A_2(self, Access.RW, 0x00E1, block, True) - self.BIQUAD_V_B_0 = self._BIQUAD_V_B_0(self, Access.RW, 0x00E2, block, True) - self.BIQUAD_V_B_1 = self._BIQUAD_V_B_1(self, Access.RW, 0x00E3, block, True) - self.BIQUAD_V_B_2 = self._BIQUAD_V_B_2(self, Access.RW, 0x00E4, block, True) - self.BIQUAD_V_ENABLE = self._BIQUAD_V_ENABLE(self, Access.RW, 0x00E5, block, False) - self.BIQUAD_T_A_1 = self._BIQUAD_T_A_1(self, Access.RW, 0x00E6, block, True) - self.BIQUAD_T_A_2 = self._BIQUAD_T_A_2(self, Access.RW, 0x00E7, block, True) - self.BIQUAD_T_B_0 = self._BIQUAD_T_B_0(self, Access.RW, 0x00E8, block, True) - self.BIQUAD_T_B_1 = self._BIQUAD_T_B_1(self, Access.RW, 0x00E9, block, True) - self.BIQUAD_T_B_2 = self._BIQUAD_T_B_2(self, Access.RW, 0x00EA, block, True) - self.BIQUAD_T_ENABLE = self._BIQUAD_T_ENABLE(self, Access.RW, 0x00EB, block, False) - self.VELOCITY_CONFIG = self._VELOCITY_CONFIG(self, Access.RW, 0x0100, block, False) - self.VELOCITY_SCALING = self._VELOCITY_SCALING(self, Access.RW, 0x0101, block, False) + self.INFO_CHIP = self._INFO_CHIP( self, Access.R, 0x0000, block, False) + self.INFO_VARIANT = self._INFO_VARIANT( self, Access.R, 0x0001, block, False) + self.INFO_REVISION = self._INFO_REVISION( self, Access.R, 0x0002, block, False) + self.ADC_I1_I0_RAW = self._ADC_I1_I0_RAW( self, Access.R, 0x0020, block, False) + self.ADC_I3_I2_RAW = self._ADC_I3_I2_RAW( self, Access.R, 0x0021, block, False) + self.ADC_U1_U0_RAW = self._ADC_U1_U0_RAW( self, Access.R, 0x0022, block, False) + self.ADC_U3_U2_RAW = self._ADC_U3_U2_RAW( self, Access.R, 0x0023, block, False) + self.ADC_TEMP_VM_RAW = self._ADC_TEMP_VM_RAW( self, Access.R, 0x0024, block, False) + self.ADC_AIN1_AIN0_RAW = self._ADC_AIN1_AIN0_RAW( self, Access.R, 0x0025, block, False) + self.ADC_AIN3_AIN2_RAW = self._ADC_AIN3_AIN2_RAW( self, Access.R, 0x0026, block, False) + self.ADC_I_GEN_CONFIG = self._ADC_I_GEN_CONFIG( self, Access.RW, 0x0040, block, False) + self.ADC_I0_CONFIG = self._ADC_I0_CONFIG( self, Access.RW, 0x0041, block, False) + self.ADC_I1_CONFIG = self._ADC_I1_CONFIG( self, Access.RW, 0x0042, block, False) + self.ADC_I2_CONFIG = self._ADC_I2_CONFIG( self, Access.RW, 0x0043, block, False) + self.ADC_I3_CONFIG = self._ADC_I3_CONFIG( self, Access.RW, 0x0044, block, False) + self.ADC_I1_I0_SCALED = self._ADC_I1_I0_SCALED( self, Access.R, 0x0045, block, False) + self.ADC_I3_I2_SCALED = self._ADC_I3_I2_SCALED( self, Access.R, 0x0046, block, False) + self.ADC_IWY_IUX = self._ADC_IWY_IUX( self, Access.R, 0x0047, block, False) + self.ADC_IV = self._ADC_IV( self, Access.R, 0x0048, block, True) + self.ADC_STATUS = self._ADC_STATUS( self, Access.RWC, 0x0049, block, False) + self.MOTOR_CONFIG = self._MOTOR_CONFIG( self, Access.RW, 0x0060, block, False) + self.MOTION_CONFIG = self._MOTION_CONFIG( self, Access.RW, 0x0061, block, False) + self.PHI_E_SELECTION = self._PHI_E_SELECTION( self, Access.RW, 0x0062, block, False) + self.PHI_E = self._PHI_E( self, Access.R, 0x0063, block, True) + self.PWM_CONFIG = self._PWM_CONFIG( self, Access.RW, 0x0080, block, False) + self.PWM_MAXCNT = self._PWM_MAXCNT( self, Access.RW, 0x0081, block, False) + self.PWM_SWITCH_LIMIT = self._PWM_SWITCH_LIMIT( self, Access.RW, 0x0083, block, False) + self.ABN_PHI_E_PHI_M = self._ABN_PHI_E_PHI_M( self, Access.R, 0x00A0, block, False) + self.ABN_MODE = self._ABN_MODE( self, Access.RW, 0x00A1, block, False) + self.ABN_CPR = self._ABN_CPR( self, Access.RW, 0x00A2, block, False) + self.ABN_CPR_INV = self._ABN_CPR_INV( self, Access.RW, 0x00A3, block, False) + self.ABN_COUNT = self._ABN_COUNT( self, Access.RW, 0x00A4, block, False) + self.ABN_COUNT_N = self._ABN_COUNT_N( self, Access.RW, 0x00A5, block, False) + self.ABN_PHI_E_OFFSET = self._ABN_PHI_E_OFFSET( self, Access.RW, 0x00A6, block, True) + self.HALL_MODE = self._HALL_MODE( self, Access.RW, 0x00C0, block, False) + self.HALL_DPHI_MAX = self._HALL_DPHI_MAX( self, Access.RW, 0x00C1, block, False) + self.HALL_PHI_E_OFFSET = self._HALL_PHI_E_OFFSET( self, Access.RW, 0x00C2, block, True) + self.HALL_COUNT = self._HALL_COUNT( self, Access.R, 0x00C3, block, True) + self.HALL_PHI_E_EXTRAPOLATED_PHI_E = self._HALL_PHI_E_EXTRAPOLATED_PHI_E( self, Access.R, 0x00C4, block, False) + self.HALL_POSITION_060_POSITION_000 = self._HALL_POSITION_060_POSITION_000( self, Access.RW, 0x00C5, block, False) + self.HALL_POSITION_180_POSITION_120 = self._HALL_POSITION_180_POSITION_120( self, Access.RW, 0x00C6, block, False) + self.HALL_POSITION_300_POSITION_240 = self._HALL_POSITION_300_POSITION_240( self, Access.RW, 0x00C7, block, False) + self.BIQUAD_V_A_1 = self._BIQUAD_V_A_1( self, Access.RW, 0x00E0, block, True) + self.BIQUAD_V_A_2 = self._BIQUAD_V_A_2( self, Access.RW, 0x00E1, block, True) + self.BIQUAD_V_B_0 = self._BIQUAD_V_B_0( self, Access.RW, 0x00E2, block, True) + self.BIQUAD_V_B_1 = self._BIQUAD_V_B_1( self, Access.RW, 0x00E3, block, True) + self.BIQUAD_V_B_2 = self._BIQUAD_V_B_2( self, Access.RW, 0x00E4, block, True) + self.BIQUAD_V_ENABLE = self._BIQUAD_V_ENABLE( self, Access.RW, 0x00E5, block, False) + self.BIQUAD_T_A_1 = self._BIQUAD_T_A_1( self, Access.RW, 0x00E6, block, True) + self.BIQUAD_T_A_2 = self._BIQUAD_T_A_2( self, Access.RW, 0x00E7, block, True) + self.BIQUAD_T_B_0 = self._BIQUAD_T_B_0( self, Access.RW, 0x00E8, block, True) + self.BIQUAD_T_B_1 = self._BIQUAD_T_B_1( self, Access.RW, 0x00E9, block, True) + self.BIQUAD_T_B_2 = self._BIQUAD_T_B_2( self, Access.RW, 0x00EA, block, True) + self.BIQUAD_T_ENABLE = self._BIQUAD_T_ENABLE( self, Access.RW, 0x00EB, block, False) + self.VELOCITY_CONFIG = self._VELOCITY_CONFIG( self, Access.RW, 0x0100, block, False) + self.VELOCITY_SCALING = self._VELOCITY_SCALING( self, Access.RW, 0x0101, block, True) self.V_MIN_POS_DEV_TIME_COUNTER_LIMIT = self._V_MIN_POS_DEV_TIME_COUNTER_LIMIT(self, Access.RW, 0x0102, block, False) - self.MAX_VEL_DEVIATION = self._MAX_VEL_DEVIATION(self, Access.RW, 0x0103, block, False) - self.POSITION_CONFIG = self._POSITION_CONFIG(self, Access.RW, 0x0120, block, False) - self.MAX_POS_DEVIATION = self._MAX_POS_DEVIATION(self, Access.RW, 0x0121, block, False) - self.POSITION_STEP_WIDTH = self._POSITION_STEP_WIDTH(self, Access.RW, 0x0122, block, False) - self.RAMPER_STATUS = self._RAMPER_STATUS(self, Access.RWC, 0x0140, block, False) - self.RAMPER_A1 = self._RAMPER_A1(self, Access.RW, 0x0141, block, False) - self.RAMPER_A2 = self._RAMPER_A2(self, Access.RW, 0x0142, block, False) - self.RAMPER_A_MAX = self._RAMPER_A_MAX(self, Access.RW, 0x0143, block, False) - self.RAMPER_D1 = self._RAMPER_D1(self, Access.RW, 0x0144, block, False) - self.RAMPER_D2 = self._RAMPER_D2(self, Access.RW, 0x0145, block, False) - self.RAMPER_D_MAX = self._RAMPER_D_MAX(self, Access.RW, 0x0146, block, False) - self.RAMPER_V_START = self._RAMPER_V_START(self, Access.RW, 0x0147, block, False) - self.RAMPER_V1 = self._RAMPER_V1(self, Access.RW, 0x0148, block, False) - self.RAMPER_V2 = self._RAMPER_V2(self, Access.RW, 0x0149, block, False) - self.RAMPER_V_STOP = self._RAMPER_V_STOP(self, Access.RW, 0x014A, block, False) - self.RAMPER_V_MAX = self._RAMPER_V_MAX(self, Access.RW, 0x014B, block, False) - self.RAMPER_V_TARGET = self._RAMPER_V_TARGET(self, Access.RW, 0x014C, block, True) - self.RAMPER_SWITCH_MODE = self._RAMPER_SWITCH_MODE(self, Access.RW, 0x014D, block, False) - self.RAMPER_TIME_CONFIG = self._RAMPER_TIME_CONFIG(self, Access.RW, 0x014E, block, False) - self.RAMPER_A_ACTUAL = self._RAMPER_A_ACTUAL(self, Access.R, 0x014F, block, True) - self.RAMPER_X_ACTUAL = self._RAMPER_X_ACTUAL(self, Access.R, 0x0150, block, True) - self.RAMPER_V_ACTUAL = self._RAMPER_V_ACTUAL(self, Access.R, 0x0151, block, True) - self.RAMPER_X_TARGET = self._RAMPER_X_TARGET(self, Access.RW, 0x0152, block, True) - self.RAMPER_PHI_E = self._RAMPER_PHI_E(self, Access.R, 0x0153, block, True) - self.RAMPER_PHI_E_OFFSET = self._RAMPER_PHI_E_OFFSET(self, Access.RW, 0x0154, block, True) - self.RAMPER_ACC_FF = self._RAMPER_ACC_FF(self, Access.RW, 0x0155, block, False) - self.RAMPER_X_ACTUAL_LATCH = self._RAMPER_X_ACTUAL_LATCH(self, Access.R, 0x0156, block, True) - self.POSITION_ACTUAL_LATCH = self._POSITION_ACTUAL_LATCH(self, Access.R, 0x0157, block, True) - self.PRBS_AMPLITUDE = self._PRBS_AMPLITUDE(self, Access.RW, 0x0160, block, True) - self.PRBS_DOWN_SAMPLING_RATIO = self._PRBS_DOWN_SAMPLING_RATIO(self, Access.RW, 0x0161, block, False) - self.PID_CONFIG = self._PID_CONFIG(self, Access.RW, 0x0180, block, False) - self.PID_FLUX_COEFF = self._PID_FLUX_COEFF(self, Access.RW, 0x0181, block, False) - self.PID_TORQUE_COEFF = self._PID_TORQUE_COEFF(self, Access.RW, 0x0182, block, False) - self.PID_FIELDWEAK_COEFF = self._PID_FIELDWEAK_COEFF(self, Access.RW, 0x0183, block, False) - self.PID_U_S_MAX = self._PID_U_S_MAX(self, Access.RW, 0x0184, block, False) - self.PID_VELOCITY_COEFF = self._PID_VELOCITY_COEFF(self, Access.RW, 0x0185, block, False) - self.PID_POSITION_COEFF = self._PID_POSITION_COEFF(self, Access.RW, 0x0186, block, False) - self.PID_POSITION_TOLERANCE = self._PID_POSITION_TOLERANCE(self, Access.RW, 0x0187, block, False) - self.PID_POSITION_TOLERANCE_DELAY = self._PID_POSITION_TOLERANCE_DELAY(self, Access.RW, 0x0188, block, False) - self.PID_UQ_UD_LIMITS = self._PID_UQ_UD_LIMITS(self, Access.RW, 0x0189, block, False) - self.PID_TORQUE_FLUX_LIMITS = self._PID_TORQUE_FLUX_LIMITS(self, Access.RW, 0x018A, block, False) - self.PID_VELOCITY_LIMIT = self._PID_VELOCITY_LIMIT(self, Access.RW, 0x018B, block, False) - self.PID_POSITION_LIMIT_LOW = self._PID_POSITION_LIMIT_LOW(self, Access.RW, 0x018C, block, True) - self.PID_POSITION_LIMIT_HIGH = self._PID_POSITION_LIMIT_HIGH(self, Access.RW, 0x018D, block, True) - self.PID_TORQUE_FLUX_TARGET = self._PID_TORQUE_FLUX_TARGET(self, Access.RW, 0x018E, block, False) - self.PID_TORQUE_FLUX_OFFSET = self._PID_TORQUE_FLUX_OFFSET(self, Access.RW, 0x018F, block, False) - self.PID_VELOCITY_TARGET = self._PID_VELOCITY_TARGET(self, Access.RW, 0x0190, block, True) - self.PID_VELOCITY_OFFSET = self._PID_VELOCITY_OFFSET(self, Access.RW, 0x0191, block, True) - self.PID_POSITION_TARGET = self._PID_POSITION_TARGET(self, Access.RW, 0x0192, block, True) - self.PID_TORQUE_FLUX_ACTUAL = self._PID_TORQUE_FLUX_ACTUAL(self, Access.R, 0x0193, block, False) - self.PID_VELOCITY_ACTUAL = self._PID_VELOCITY_ACTUAL(self, Access.R, 0x0194, block, True) - self.PID_POSITION_ACTUAL = self._PID_POSITION_ACTUAL(self, Access.RW, 0x0195, block, True) - self.PID_POSITION_ACTUAL_OFFSET = self._PID_POSITION_ACTUAL_OFFSET(self, Access.RW, 0x0196, block, True) - self.PID_TORQUE_ERROR = self._PID_TORQUE_ERROR(self, Access.R, 0x0197, block, True) - self.PID_FLUX_ERROR = self._PID_FLUX_ERROR(self, Access.R, 0x0198, block, True) - self.PID_VELOCITY_ERROR = self._PID_VELOCITY_ERROR(self, Access.R, 0x0199, block, True) - self.PID_POSITION_ERROR = self._PID_POSITION_ERROR(self, Access.R, 0x019A, block, True) - self.PID_TORQUE_INTEGRATOR = self._PID_TORQUE_INTEGRATOR(self, Access.RW, 0x019B, block, True) - self.PID_FLUX_INTEGRATOR = self._PID_FLUX_INTEGRATOR(self, Access.RW, 0x019C, block, True) - self.PID_VELOCITY_INTEGRATOR = self._PID_VELOCITY_INTEGRATOR(self, Access.RW, 0x019D, block, True) - self.PID_POSITION_INTEGRATOR = self._PID_POSITION_INTEGRATOR(self, Access.RW, 0x019E, block, True) - self.PIDIN_TORQUE_FLUX_TARGET = self._PIDIN_TORQUE_FLUX_TARGET(self, Access.R, 0x01A0, block, False) - self.PIDIN_VELOCITY_TARGET = self._PIDIN_VELOCITY_TARGET(self, Access.R, 0x01A1, block, True) - self.PIDIN_POSITION_TARGET = self._PIDIN_POSITION_TARGET(self, Access.R, 0x01A2, block, True) + self.MAX_VEL_DEVIATION = self._MAX_VEL_DEVIATION( self, Access.RW, 0x0103, block, False) + self.POSITION_CONFIG = self._POSITION_CONFIG( self, Access.RW, 0x0120, block, False) + self.MAX_POS_DEVIATION = self._MAX_POS_DEVIATION( self, Access.RW, 0x0121, block, False) + self.RAMPER_STATUS = self._RAMPER_STATUS( self, Access.RWC, 0x0140, block, False) + self.RAMPER_A1 = self._RAMPER_A1( self, Access.RW, 0x0141, block, False) + self.RAMPER_A2 = self._RAMPER_A2( self, Access.RW, 0x0142, block, False) + self.RAMPER_A_MAX = self._RAMPER_A_MAX( self, Access.RW, 0x0143, block, False) + self.RAMPER_D1 = self._RAMPER_D1( self, Access.RW, 0x0144, block, False) + self.RAMPER_D2 = self._RAMPER_D2( self, Access.RW, 0x0145, block, False) + self.RAMPER_D_MAX = self._RAMPER_D_MAX( self, Access.RW, 0x0146, block, False) + self.RAMPER_V_START = self._RAMPER_V_START( self, Access.RW, 0x0147, block, False) + self.RAMPER_V1 = self._RAMPER_V1( self, Access.RW, 0x0148, block, False) + self.RAMPER_V2 = self._RAMPER_V2( self, Access.RW, 0x0149, block, False) + self.RAMPER_V_STOP = self._RAMPER_V_STOP( self, Access.RW, 0x014A, block, False) + self.RAMPER_V_MAX = self._RAMPER_V_MAX( self, Access.RW, 0x014B, block, False) + self.RAMPER_V_TARGET = self._RAMPER_V_TARGET( self, Access.RW, 0x014C, block, True) + self.RAMPER_SWITCH_MODE = self._RAMPER_SWITCH_MODE( self, Access.RW, 0x014D, block, False) + self.RAMPER_TIME_CONFIG = self._RAMPER_TIME_CONFIG( self, Access.RW, 0x014E, block, False) + self.RAMPER_A_ACTUAL = self._RAMPER_A_ACTUAL( self, Access.R, 0x014F, block, True) + self.RAMPER_X_ACTUAL = self._RAMPER_X_ACTUAL( self, Access.R, 0x0150, block, True) + self.RAMPER_V_ACTUAL = self._RAMPER_V_ACTUAL( self, Access.R, 0x0151, block, True) + self.RAMPER_X_TARGET = self._RAMPER_X_TARGET( self, Access.RW, 0x0152, block, True) + self.RAMPER_PHI_E = self._RAMPER_PHI_E( self, Access.R, 0x0153, block, True) + self.RAMPER_PHI_E_OFFSET = self._RAMPER_PHI_E_OFFSET( self, Access.RW, 0x0154, block, True) + self.RAMPER_ACC_FF = self._RAMPER_ACC_FF( self, Access.RW, 0x0155, block, False) + self.RAMPER_X_ACTUAL_LATCH = self._RAMPER_X_ACTUAL_LATCH( self, Access.R, 0x0156, block, True) + self.POSITION_ACTUAL_LATCH = self._POSITION_ACTUAL_LATCH( self, Access.R, 0x0157, block, True) + self.PRBS_AMPLITUDE = self._PRBS_AMPLITUDE( self, Access.RW, 0x0160, block, True) + self.PRBS_DOWN_SAMPLING_RATIO = self._PRBS_DOWN_SAMPLING_RATIO( self, Access.RW, 0x0161, block, False) + self.PID_CONFIG = self._PID_CONFIG( self, Access.RW, 0x0180, block, False) + self.PID_FLUX_COEFF = self._PID_FLUX_COEFF( self, Access.RW, 0x0181, block, False) + self.PID_TORQUE_COEFF = self._PID_TORQUE_COEFF( self, Access.RW, 0x0182, block, False) + self.PID_FIELDWEAK_COEFF = self._PID_FIELDWEAK_COEFF( self, Access.RW, 0x0183, block, False) + self.PID_U_S_MAX = self._PID_U_S_MAX( self, Access.RW, 0x0184, block, False) + self.PID_VELOCITY_COEFF = self._PID_VELOCITY_COEFF( self, Access.RW, 0x0185, block, False) + self.PID_POSITION_COEFF = self._PID_POSITION_COEFF( self, Access.RW, 0x0186, block, False) + self.PID_POSITION_TOLERANCE = self._PID_POSITION_TOLERANCE( self, Access.RW, 0x0187, block, False) + self.PID_POSITION_TOLERANCE_DELAY = self._PID_POSITION_TOLERANCE_DELAY( self, Access.RW, 0x0188, block, False) + self.PID_UQ_UD_LIMITS = self._PID_UQ_UD_LIMITS( self, Access.RW, 0x0189, block, False) + self.PID_TORQUE_FLUX_LIMITS = self._PID_TORQUE_FLUX_LIMITS( self, Access.RW, 0x018A, block, False) + self.PID_VELOCITY_LIMIT = self._PID_VELOCITY_LIMIT( self, Access.RW, 0x018B, block, False) + self.PID_POSITION_LIMIT_LOW = self._PID_POSITION_LIMIT_LOW( self, Access.RW, 0x018C, block, True) + self.PID_POSITION_LIMIT_HIGH = self._PID_POSITION_LIMIT_HIGH( self, Access.RW, 0x018D, block, True) + self.PID_TORQUE_FLUX_TARGET = self._PID_TORQUE_FLUX_TARGET( self, Access.RW, 0x018E, block, False) + self.PID_TORQUE_FLUX_OFFSET = self._PID_TORQUE_FLUX_OFFSET( self, Access.RW, 0x018F, block, False) + self.PID_VELOCITY_TARGET = self._PID_VELOCITY_TARGET( self, Access.RW, 0x0190, block, True) + self.PID_VELOCITY_OFFSET = self._PID_VELOCITY_OFFSET( self, Access.RW, 0x0191, block, True) + self.PID_POSITION_TARGET = self._PID_POSITION_TARGET( self, Access.RW, 0x0192, block, True) + self.PID_TORQUE_FLUX_ACTUAL = self._PID_TORQUE_FLUX_ACTUAL( self, Access.R, 0x0193, block, False) + self.PID_VELOCITY_ACTUAL = self._PID_VELOCITY_ACTUAL( self, Access.R, 0x0194, block, True) + self.PID_POSITION_ACTUAL = self._PID_POSITION_ACTUAL( self, Access.RW, 0x0195, block, True) + self.PID_POSITION_ACTUAL_OFFSET = self._PID_POSITION_ACTUAL_OFFSET( self, Access.RW, 0x0196, block, True) + self.PID_TORQUE_ERROR = self._PID_TORQUE_ERROR( self, Access.R, 0x0197, block, True) + self.PID_FLUX_ERROR = self._PID_FLUX_ERROR( self, Access.R, 0x0198, block, True) + self.PID_VELOCITY_ERROR = self._PID_VELOCITY_ERROR( self, Access.R, 0x0199, block, True) + self.PID_POSITION_ERROR = self._PID_POSITION_ERROR( self, Access.R, 0x019A, block, True) + self.PID_TORQUE_INTEGRATOR = self._PID_TORQUE_INTEGRATOR( self, Access.RW, 0x019B, block, True) + self.PID_FLUX_INTEGRATOR = self._PID_FLUX_INTEGRATOR( self, Access.RW, 0x019C, block, True) + self.PID_VELOCITY_INTEGRATOR = self._PID_VELOCITY_INTEGRATOR( self, Access.RW, 0x019D, block, True) + self.PID_POSITION_INTEGRATOR = self._PID_POSITION_INTEGRATOR( self, Access.RW, 0x019E, block, True) + self.PIDIN_TORQUE_FLUX_TARGET = self._PIDIN_TORQUE_FLUX_TARGET( self, Access.R, 0x01A0, block, False) + self.PIDIN_VELOCITY_TARGET = self._PIDIN_VELOCITY_TARGET( self, Access.R, 0x01A1, block, True) + self.PIDIN_POSITION_TARGET = self._PIDIN_POSITION_TARGET( self, Access.R, 0x01A2, block, True) self.PIDIN_TORQUE_FLUX_TARGET_LIMITED = self._PIDIN_TORQUE_FLUX_TARGET_LIMITED(self, Access.R, 0x01A3, block, False) - self.PIDIN_VELOCITY_TARGET_LIMITED = self._PIDIN_VELOCITY_TARGET_LIMITED(self, Access.R, 0x01A4, block, True) - self.PIDIN_POSITION_TARGET_LIMITED = self._PIDIN_POSITION_TARGET_LIMITED(self, Access.R, 0x01A5, block, True) - self.FOC_IBETA_IALPHA = self._FOC_IBETA_IALPHA(self, Access.R, 0x01A6, block, False) - self.FOC_IQ_ID = self._FOC_IQ_ID(self, Access.R, 0x01A7, block, False) - self.FOC_UQ_UD = self._FOC_UQ_UD(self, Access.R, 0x01A8, block, False) - self.FOC_UQ_UD_LIMITED = self._FOC_UQ_UD_LIMITED(self, Access.R, 0x01A9, block, False) - self.FOC_UBETA_UALPHA = self._FOC_UBETA_UALPHA(self, Access.R, 0x01AA, block, False) - self.FOC_UWY_UUX = self._FOC_UWY_UUX(self, Access.R, 0x01AB, block, False) - self.FOC_UV = self._FOC_UV(self, Access.R, 0x01AC, block, True) - self.PWM_VX2_UX1 = self._PWM_VX2_UX1(self, Access.R, 0x01AD, block, False) - self.PWM_Y2_WY1 = self._PWM_Y2_WY1(self, Access.R, 0x01AE, block, False) - self.VELOCITY_FRQ = self._VELOCITY_FRQ(self, Access.R, 0x01AF, block, True) - self.VELOCITY_PER = self._VELOCITY_PER(self, Access.R, 0x01B0, block, True) - self.FOC_STATUS = self._FOC_STATUS(self, Access.R, 0x01B1, block, False) - self.U_S_ACTUAL_I_S_ACTUAL = self._U_S_ACTUAL_I_S_ACTUAL(self, Access.R, 0x01C0, block, False) - self.P_MOTOR = self._P_MOTOR(self, Access.R, 0x01C1, block, False) - self.INPUTS_RAW = self._INPUTS_RAW(self, Access.R, 0x01C2, block, False) - self.OUTPUTS_RAW = self._OUTPUTS_RAW(self, Access.R, 0x01C3, block, False) - self.STATUS_FLAGS = self._STATUS_FLAGS(self, Access.RWC, 0x01C4, block, False) - self.STATUS_MASK = self._STATUS_MASK(self, Access.RW, 0x01C5, block, False) - self.FLEX_COMP_CONF = self._FLEX_COMP_CONF(self, Access.RWC, 0x01E0, block, False) - self.FLEX_COMP_RESULT_V_U = self._FLEX_COMP_RESULT_V_U(self, Access.R, 0x01E1, block, False) - self.FLEX_COMP_RESULT_Y2_W = self._FLEX_COMP_RESULT_Y2_W(self, Access.R, 0x01E2, block, False) - self.GDRV_HW = self._GDRV_HW(self, Access.RW, 0x01E3, block, False) - self.GDRV_CFG = self._GDRV_CFG(self, Access.RW, 0x01E4, block, False) - self.GDRV_TIMING = self._GDRV_TIMING(self, Access.RW, 0x01E9, block, False) - self.GDRV_BBM = self._GDRV_BBM(self, Access.RW, 0x01EA, block, False) - self.GDRV_PROT = self._GDRV_PROT(self, Access.RW, 0x01EB, block, False) - self.GDRV_OCP_UVW = self._GDRV_OCP_UVW(self, Access.RW, 0x01EC, block, False) - self.GDRV_OCP_Y2 = self._GDRV_OCP_Y2(self, Access.RW, 0x01ED, block, False) - self.GDRV_PROT_EN = self._GDRV_PROT_EN(self, Access.RW, 0x01EE, block, False) - self.GDRV_STATUS_EN = self._GDRV_STATUS_EN(self, Access.RW, 0x01EF, block, False) - self.GDRV_STATUS = self._GDRV_STATUS(self, Access.RWC, 0x01F0, block, False) - self.GDRV_FAULT = self._GDRV_FAULT(self, Access.RWC, 0x01F1, block, False) - self.ADC_I1_I0_EXT = self._ADC_I1_I0_EXT(self, Access.RW, 0x0200, block, False) - self.ADC_I2_EXT = self._ADC_I2_EXT(self, Access.RW, 0x0201, block, True) - self.PWM_VX2_UX1_EXT = self._PWM_VX2_UX1_EXT(self, Access.RW, 0x0202, block, False) - self.PWM_Y2_WY1_EXT = self._PWM_Y2_WY1_EXT(self, Access.RW, 0x0203, block, False) - self.PWM_EXT_Y2_ALT = self._PWM_EXT_Y2_ALT(self, Access.RW, 0x0204, block, False) - self.VOLTAGE_EXT = self._VOLTAGE_EXT(self, Access.RW, 0x0205, block, False) - self.PHI_EXT = self._PHI_EXT(self, Access.RW, 0x0206, block, False) - self.VELOCITY_EXT = self._VELOCITY_EXT(self, Access.RW, 0x0208, block, True) - + self.PIDIN_VELOCITY_TARGET_LIMITED = self._PIDIN_VELOCITY_TARGET_LIMITED( self, Access.R, 0x01A4, block, True) + self.PIDIN_POSITION_TARGET_LIMITED = self._PIDIN_POSITION_TARGET_LIMITED( self, Access.R, 0x01A5, block, True) + self.FOC_IBETA_IALPHA = self._FOC_IBETA_IALPHA( self, Access.R, 0x01A6, block, False) + self.FOC_IQ_ID = self._FOC_IQ_ID( self, Access.R, 0x01A7, block, False) + self.FOC_UQ_UD = self._FOC_UQ_UD( self, Access.R, 0x01A8, block, False) + self.FOC_UQ_UD_LIMITED = self._FOC_UQ_UD_LIMITED( self, Access.R, 0x01A9, block, False) + self.FOC_UBETA_UALPHA = self._FOC_UBETA_UALPHA( self, Access.R, 0x01AA, block, False) + self.FOC_UWY_UUX = self._FOC_UWY_UUX( self, Access.R, 0x01AB, block, False) + self.FOC_UV = self._FOC_UV( self, Access.R, 0x01AC, block, True) + self.PWM_VX2_UX1 = self._PWM_VX2_UX1( self, Access.R, 0x01AD, block, False) + self.PWM_Y2_WY1 = self._PWM_Y2_WY1( self, Access.R, 0x01AE, block, False) + self.VELOCITY_FRQ = self._VELOCITY_FRQ( self, Access.R, 0x01AF, block, True) + self.VELOCITY_PER = self._VELOCITY_PER( self, Access.R, 0x01B0, block, True) + self.U_S_ACTUAL_I_S_ACTUAL = self._U_S_ACTUAL_I_S_ACTUAL( self, Access.R, 0x01C0, block, False) + self.P_MOTOR = self._P_MOTOR( self, Access.R, 0x01C1, block, False) + self.INPUTS_RAW = self._INPUTS_RAW( self, Access.R, 0x01C2, block, False) + self.OUTPUTS_RAW = self._OUTPUTS_RAW( self, Access.R, 0x01C3, block, False) + self.STATUS_FLAGS = self._STATUS_FLAGS( self, Access.RWC, 0x01C4, block, False) + self.GDRV_HW = self._GDRV_HW( self, Access.RW, 0x01E3, block, False) + self.GDRV_CFG = self._GDRV_CFG( self, Access.RW, 0x01E4, block, False) + self.GDRV_TIMING = self._GDRV_TIMING( self, Access.RW, 0x01E9, block, False) + self.GDRV_BBM = self._GDRV_BBM( self, Access.RW, 0x01EA, block, False) + self.GDRV_PROT = self._GDRV_PROT( self, Access.RW, 0x01EB, block, False) + self.GDRV_OCP_UVW = self._GDRV_OCP_UVW( self, Access.RW, 0x01EC, block, False) + self.GDRV_OCP_Y2 = self._GDRV_OCP_Y2( self, Access.RW, 0x01ED, block, False) + self.GDRV_PROT_EN = self._GDRV_PROT_EN( self, Access.RW, 0x01EE, block, False) + self.GDRV_STATUS_EN = self._GDRV_STATUS_EN( self, Access.RW, 0x01EF, block, False) + self.GDRV_STATUS = self._GDRV_STATUS( self, Access.RWC, 0x01F0, block, False) + self.GDRV_FAULT = self._GDRV_FAULT( self, Access.RWC, 0x01F1, block, False) + self.ADC_I1_I0_EXT = self._ADC_I1_I0_EXT( self, Access.RW, 0x0200, block, False) + self.ADC_I2_EXT = self._ADC_I2_EXT( self, Access.RW, 0x0201, block, True) + self.PWM_VX2_UX1_EXT = self._PWM_VX2_UX1_EXT( self, Access.RW, 0x0202, block, False) + self.PWM_Y2_WY1_EXT = self._PWM_Y2_WY1_EXT( self, Access.RW, 0x0203, block, False) + self.PWM_EXT_Y2_ALT = self._PWM_EXT_Y2_ALT( self, Access.RW, 0x0204, block, False) + self.VOLTAGE_EXT = self._VOLTAGE_EXT( self, Access.RW, 0x0205, block, False) + self.PHI_EXT = self._PHI_EXT( self, Access.RW, 0x0206, block, False) + self.VELOCITY_EXT = self._VELOCITY_EXT( self, Access.RW, 0x0208, block, True) diff --git a/pytrinamic/ic/TMC9660/SYS_CTRLmap.py b/pytrinamic/ic/TMC9660/SYS_CTRLmap.py index 39c0db6..d142ed6 100644 --- a/pytrinamic/ic/TMC9660/SYS_CTRLmap.py +++ b/pytrinamic/ic/TMC9660/SYS_CTRLmap.py @@ -1,5 +1,5 @@ ################################################################################ -# Copyright © 2024 Analog Devices Inc. All Rights Reserved. +# Copyright © 2025 Analog Devices Inc. All Rights Reserved. # This software is proprietary to Analog Devices, Inc. and its licensors. ################################################################################ @@ -14,121 +14,8 @@ def __init__(self, block=None): self.ALL_REGISTERS = _ALL_REGISTERS(block) - - class _ALL_REGISTERS(RegisterGroup): - class _SW_RESET(Register): - - class _RESET(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("RESET", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OTHER(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OTHER", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CPU(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CPU", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("SW_RESET", parent, access, address, block, signed) - self.RESET = self._RESET(self, Access.RW, 0x0000000F, 0, signed=False) - self.OTHER = self._OTHER(self, Access.RW, 0x00000040, 6, signed=False) - self.CPU = self._CPU(self, Access.RW, 0x00000080, 7, signed=False) - - class _SW_RESET_STATUS(Register): - - class _OTHER(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OTHER", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CPU(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CPU", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("SW_RESET_STATUS", parent, access, address, block, signed) - self.OTHER = self._OTHER(self, Access.RWC, 0x00000040, 6, signed=False) - self.CPU = self._CPU(self, Access.RWC, 0x00000080, 7, signed=False) - - class _PMU_CTRL(Register): - - class _CP_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CP_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _LDO_ENABLE(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDO_ENABLE", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _VEXT1_CNFG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("VEXT1_CNFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _VEXT2_CNFG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("VEXT2_CNFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _VEXT1_SS_CNFG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("VEXT1_SS_CNFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _VEXT2_SS_CNFG(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("VEXT2_SS_CNFG", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _FRC_CP_SHTDW(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("FRC_CP_SHTDW", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("PMU_CTRL", parent, access, address, block, signed) - self.CP_ENABLE = self._CP_ENABLE(self, Access.RW, 0x00000001, 0, signed=False) - self.LDO_ENABLE = self._LDO_ENABLE(self, Access.RW, 0x00000002, 1, signed=False) - self.VEXT1_CNFG = self._VEXT1_CNFG(self, Access.RW, 0x0000000C, 2, signed=False) - self.VEXT2_CNFG = self._VEXT2_CNFG(self, Access.RW, 0x00000030, 4, signed=False) - self.VEXT1_SS_CNFG = self._VEXT1_SS_CNFG(self, Access.RW, 0x000000C0, 6, signed=False) - self.VEXT2_SS_CNFG = self._VEXT2_SS_CNFG(self, Access.RW, 0x00000300, 8, signed=False) - self.FRC_CP_SHTDW = self._FRC_CP_SHTDW(self, Access.RW, 0x00000400, 10, signed=False) - class _FAULT_STS(Register): class _BCK_UVLO(Field): @@ -231,20 +118,20 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("FAULT_STS", parent, access, address, block, signed) - self.BCK_UVLO = self._BCK_UVLO(self, Access.R, 0x00000001, 0, signed=False) - self.BCK_SHORT = self._BCK_SHORT(self, Access.R, 0x00000002, 1, signed=False) - self.LDOEXT_TSD = self._LDOEXT_TSD(self, Access.R, 0x00000004, 2, signed=False) + self.BCK_UVLO = self._BCK_UVLO( self, Access.R, 0x00000001, 0, signed=False) + self.BCK_SHORT = self._BCK_SHORT( self, Access.R, 0x00000002, 1, signed=False) + self.LDOEXT_TSD = self._LDOEXT_TSD( self, Access.R, 0x00000004, 2, signed=False) self.LDOEXT1_SHORT = self._LDOEXT1_SHORT(self, Access.R, 0x00000008, 3, signed=False) self.LDOEXT2_SHORT = self._LDOEXT2_SHORT(self, Access.R, 0x00000010, 4, signed=False) - self.CHGP_OK = self._CHGP_OK(self, Access.R, 0x00000020, 5, signed=False) - self.CHGP_SHORT = self._CHGP_SHORT(self, Access.R, 0x00000040, 6, signed=False) - self.VSA_UVLO = self._VSA_UVLO(self, Access.R, 0x00000080, 7, signed=False) - self.VDD_UVLO = self._VDD_UVLO(self, Access.R, 0x00000100, 8, signed=False) - self.VDDA_UVLO = self._VDDA_UVLO(self, Access.R, 0x00000200, 9, signed=False) - self.VCCIO_UVLO = self._VCCIO_UVLO(self, Access.R, 0x00000400, 10, signed=False) - self.LDO1_READY = self._LDO1_READY(self, Access.R, 0x00000800, 11, signed=False) - self.LDO2_READY = self._LDO2_READY(self, Access.R, 0x00001000, 12, signed=False) - self.V_EN_OK = self._V_EN_OK(self, Access.R, 0x00002000, 13, signed=False) + self.CHGP_OK = self._CHGP_OK( self, Access.R, 0x00000020, 5, signed=False) + self.CHGP_SHORT = self._CHGP_SHORT( self, Access.R, 0x00000040, 6, signed=False) + self.VSA_UVLO = self._VSA_UVLO( self, Access.R, 0x00000080, 7, signed=False) + self.VDD_UVLO = self._VDD_UVLO( self, Access.R, 0x00000100, 8, signed=False) + self.VDDA_UVLO = self._VDDA_UVLO( self, Access.R, 0x00000200, 9, signed=False) + self.VCCIO_UVLO = self._VCCIO_UVLO( self, Access.R, 0x00000400, 10, signed=False) + self.LDO1_READY = self._LDO1_READY( self, Access.R, 0x00000800, 11, signed=False) + self.LDO2_READY = self._LDO2_READY( self, Access.R, 0x00001000, 12, signed=False) + self.V_EN_OK = self._V_EN_OK( self, Access.R, 0x00002000, 13, signed=False) class _FAULT_R_INT(Register): @@ -355,21 +242,21 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("FAULT_R_INT", parent, access, address, block, signed) - self.BCK_UVLO_LTC = self._BCK_UVLO_LTC(self, Access.RWC, 0x00000001, 0, signed=False) - self.BCK_SHORT_RE_LTC = self._BCK_SHORT_RE_LTC(self, Access.RWC, 0x00000002, 1, signed=False) - self.LDOEXT_TSD_LTC = self._LDOEXT_TSD_LTC(self, Access.RWC, 0x00000004, 2, signed=False) + self.BCK_UVLO_LTC = self._BCK_UVLO_LTC( self, Access.RWC, 0x00000001, 0, signed=False) + self.BCK_SHORT_RE_LTC = self._BCK_SHORT_RE_LTC( self, Access.RWC, 0x00000002, 1, signed=False) + self.LDOEXT_TSD_LTC = self._LDOEXT_TSD_LTC( self, Access.RWC, 0x00000004, 2, signed=False) self.LDOEXT1_SHORT_LTC = self._LDOEXT1_SHORT_LTC(self, Access.RWC, 0x00000008, 3, signed=False) self.LDOEXT2_SHORT_LTC = self._LDOEXT2_SHORT_LTC(self, Access.RWC, 0x00000010, 4, signed=False) - self.CHGP_OK_LTC = self._CHGP_OK_LTC(self, Access.RWC, 0x00000020, 5, signed=False) - self.CHGP_SHORT_LTC = self._CHGP_SHORT_LTC(self, Access.RWC, 0x00000040, 6, signed=False) - self.VSA_UVLO_LTC = self._VSA_UVLO_LTC(self, Access.RWC, 0x00000080, 7, signed=False) - self.VDD_UVLO_LTC = self._VDD_UVLO_LTC(self, Access.RWC, 0x00000100, 8, signed=False) - self.VDDA_UVLO_LTC = self._VDDA_UVLO_LTC(self, Access.RWC, 0x00000200, 9, signed=False) - self.VCCIO_UVLO_LTC = self._VCCIO_UVLO_LTC(self, Access.RWC, 0x00000400, 10, signed=False) + self.CHGP_OK_LTC = self._CHGP_OK_LTC( self, Access.RWC, 0x00000020, 5, signed=False) + self.CHGP_SHORT_LTC = self._CHGP_SHORT_LTC( self, Access.RWC, 0x00000040, 6, signed=False) + self.VSA_UVLO_LTC = self._VSA_UVLO_LTC( self, Access.RWC, 0x00000080, 7, signed=False) + self.VDD_UVLO_LTC = self._VDD_UVLO_LTC( self, Access.RWC, 0x00000100, 8, signed=False) + self.VDDA_UVLO_LTC = self._VDDA_UVLO_LTC( self, Access.RWC, 0x00000200, 9, signed=False) + self.VCCIO_UVLO_LTC = self._VCCIO_UVLO_LTC( self, Access.RWC, 0x00000400, 10, signed=False) self.LDO1_READY_RE_LTC = self._LDO1_READY_RE_LTC(self, Access.RWC, 0x00000800, 11, signed=False) self.LDO2_READY_RE_LTC = self._LDO2_READY_RE_LTC(self, Access.RWC, 0x00001000, 12, signed=False) - self.V_EN_OK_RE_LTC = self._V_EN_OK_RE_LTC(self, Access.RWC, 0x00002000, 13, signed=False) - self.UC_FAULT = self._UC_FAULT(self, Access.RW, 0x00008000, 15, signed=False) + self.V_EN_OK_RE_LTC = self._V_EN_OK_RE_LTC( self, Access.RWC, 0x00002000, 13, signed=False) + self.UC_FAULT = self._UC_FAULT( self, Access.RW, 0x00008000, 15, signed=False) class _FAULT_R_ENA_F(Register): @@ -473,89 +360,20 @@ def __init__(self, parent, access, mask, shift, signed): def __init__(self, parent, access, address, block, signed): super().__init__("FAULT_R_ENA_F", parent, access, address, block, signed) - self.BCK_UVLO_ENA_F = self._BCK_UVLO_ENA_F(self, Access.RW, 0x00000001, 0, signed=False) - self.BCK_SHORT_RE_ENA_F = self._BCK_SHORT_RE_ENA_F(self, Access.RW, 0x00000002, 1, signed=False) - self.LDOEXT_TSD_ENA_F = self._LDOEXT_TSD_ENA_F(self, Access.RW, 0x00000004, 2, signed=False) + self.BCK_UVLO_ENA_F = self._BCK_UVLO_ENA_F( self, Access.RW, 0x00000001, 0, signed=False) + self.BCK_SHORT_RE_ENA_F = self._BCK_SHORT_RE_ENA_F( self, Access.RW, 0x00000002, 1, signed=False) + self.LDOEXT_TSD_ENA_F = self._LDOEXT_TSD_ENA_F( self, Access.RW, 0x00000004, 2, signed=False) self.LDOEXT1_SHORT_ENA_F = self._LDOEXT1_SHORT_ENA_F(self, Access.RW, 0x00000008, 3, signed=False) self.LDOEXT2_SHORT_ENA_F = self._LDOEXT2_SHORT_ENA_F(self, Access.RW, 0x00000010, 4, signed=False) - self.CHGP_OK_ENA_F = self._CHGP_OK_ENA_F(self, Access.RW, 0x00000020, 5, signed=False) - self.CHGP_SHORT_ENA_F = self._CHGP_SHORT_ENA_F(self, Access.RW, 0x00000040, 6, signed=False) - self.VSA_UVLO_ENA_F = self._VSA_UVLO_ENA_F(self, Access.RW, 0x00000080, 7, signed=False) - self.VDD_UVLO_ENA_F = self._VDD_UVLO_ENA_F(self, Access.RW, 0x00000100, 8, signed=False) - self.VDDA_UVLO_ENA_F = self._VDDA_UVLO_ENA_F(self, Access.RW, 0x00000200, 9, signed=False) - self.VCCIO_UVLO_ENA_F = self._VCCIO_UVLO_ENA_F(self, Access.RW, 0x00000400, 10, signed=False) + self.CHGP_OK_ENA_F = self._CHGP_OK_ENA_F( self, Access.RW, 0x00000020, 5, signed=False) + self.CHGP_SHORT_ENA_F = self._CHGP_SHORT_ENA_F( self, Access.RW, 0x00000040, 6, signed=False) + self.VSA_UVLO_ENA_F = self._VSA_UVLO_ENA_F( self, Access.RW, 0x00000080, 7, signed=False) + self.VDD_UVLO_ENA_F = self._VDD_UVLO_ENA_F( self, Access.RW, 0x00000100, 8, signed=False) + self.VDDA_UVLO_ENA_F = self._VDDA_UVLO_ENA_F( self, Access.RW, 0x00000200, 9, signed=False) + self.VCCIO_UVLO_ENA_F = self._VCCIO_UVLO_ENA_F( self, Access.RW, 0x00000400, 10, signed=False) self.LDO1_READY_RE_ENA_F = self._LDO1_READY_RE_ENA_F(self, Access.RW, 0x00000800, 11, signed=False) self.LDO2_READY_RE_ENA_F = self._LDO2_READY_RE_ENA_F(self, Access.RW, 0x00001000, 12, signed=False) - self.V_EN_OK_RE_ENA_F = self._V_EN_OK_RE_ENA_F(self, Access.RW, 0x00002000, 13, signed=False) - - class _FAULT_R_ENA_I(Register): - - class _LDOEXT_TSD_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDOEXT_TSD_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _LDOEXT1_SHORT_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDOEXT1_SHORT_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _LDOEXT2_SHORT_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDOEXT2_SHORT_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CHGP_OK_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CHGP_OK_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CHGP_SHORT_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CHGP_SHORT_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _LDO1_READY_RE_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDO1_READY_RE_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _LDO2_READY_RE_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("LDO2_READY_RE_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _V_EN_OK_RE_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("V_EN_OK_RE_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FAULT_R_ENA_I", parent, access, address, block, signed) - self.LDOEXT_TSD_ENA_I = self._LDOEXT_TSD_ENA_I(self, Access.RW, 0x00000004, 2, signed=False) - self.LDOEXT1_SHORT_ENA_I = self._LDOEXT1_SHORT_ENA_I(self, Access.RW, 0x00000008, 3, signed=False) - self.LDOEXT2_SHORT_ENA_I = self._LDOEXT2_SHORT_ENA_I(self, Access.RW, 0x00000010, 4, signed=False) - self.CHGP_OK_ENA_I = self._CHGP_OK_ENA_I(self, Access.RW, 0x00000020, 5, signed=False) - self.CHGP_SHORT_ENA_I = self._CHGP_SHORT_ENA_I(self, Access.RW, 0x00000040, 6, signed=False) - self.LDO1_READY_RE_ENA_I = self._LDO1_READY_RE_ENA_I(self, Access.RW, 0x00000800, 11, signed=False) - self.LDO2_READY_RE_ENA_I = self._LDO2_READY_RE_ENA_I(self, Access.RW, 0x00001000, 12, signed=False) - self.V_EN_OK_RE_ENA_I = self._V_EN_OK_RE_ENA_I(self, Access.RW, 0x00002000, 13, signed=False) + self.V_EN_OK_RE_ENA_F = self._V_EN_OK_RE_ENA_F( self, Access.RW, 0x00002000, 13, signed=False) class _FAULT_F_INT(Register): @@ -583,387 +401,10 @@ def __init__(self, parent, access, address, block, signed): super().__init__("FAULT_F_ENA_F", parent, access, address, block, signed) self.V_EN_OK_FE_ENA_F = self._V_EN_OK_FE_ENA_F(self, Access.RW, 0x00002000, 13, signed=False) - class _FAULT_F_ENA_I(Register): - - class _V_EN_OK_FE_ENA_I(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("V_EN_OK_FE_ENA_I", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FAULT_F_ENA_I", parent, access, address, block, signed) - self.V_EN_OK_FE_ENA_I = self._V_EN_OK_FE_ENA_I(self, Access.RW, 0x00002000, 13, signed=False) - - class _FREQ_TRIM_VAON(Register): - - class _FREQ_TRIM_VAON(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("FREQ_TRIM_VAON", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("FREQ_TRIM_VAON", parent, access, address, block, signed) - self.FREQ_TRIM_VAON = self._FREQ_TRIM_VAON(self, Access.R, 0x000000FF, 0, signed=False) - - class _IZTAT_TRIM_VAON(Register): - - class _IZTAT_TRIM_VAON(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("IZTAT_TRIM_VAON", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("IZTAT_TRIM_VAON", parent, access, address, block, signed) - self.IZTAT_TRIM_VAON = self._IZTAT_TRIM_VAON(self, Access.R, 0x0000003F, 0, signed=False) - - class _SW_LVL_OTP(Register): - - class _SW_LVL_OTP(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SW_LVL_OTP", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _BOOTLOADER_BYPASS(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("BOOTLOADER_BYPASS", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("SW_LVL_OTP", parent, access, address, block, signed) - self.SW_LVL_OTP = self._SW_LVL_OTP(self, Access.R, 0x00000007, 0, signed=False) - self.BOOTLOADER_BYPASS = self._BOOTLOADER_BYPASS(self, Access.R, 0x000000F0, 4, signed=False) - - class _READBACK_OTP(Register): - - class _MTP_READY(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MTP_READY", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _MTP_READY_CLR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("MTP_READY_CLR", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CP_READY_CLR(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CP_READY_CLR", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("READBACK_OTP", parent, access, address, block, signed) - self.MTP_READY = self._MTP_READY(self, Access.R, 0x00000001, 0, signed=False) - self.MTP_READY_CLR = self._MTP_READY_CLR(self, Access.RWC, 0x00000002, 1, signed=False) - self.CP_READY_CLR = self._CP_READY_CLR(self, Access.RWC, 0x00000004, 2, signed=False) - - class _ADC_CFG0(Register): - - class _OFSL0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH0", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG0", parent, access, address, block, signed) - self.OFSL0 = self._OFSL0(self, Access.R, 0x0000003F, 0, signed=False) - self.OFSM0 = self._OFSM0(self, Access.R, 0x00000FC0, 6, signed=False) - self.OFSH0 = self._OFSH0(self, Access.R, 0x0003F000, 12, signed=False) - - class _ADC_CFG1(Register): - - class _OFSL1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH1", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG1", parent, access, address, block, signed) - self.OFSL1 = self._OFSL1(self, Access.R, 0x0000003F, 0, signed=False) - self.OFSM1 = self._OFSM1(self, Access.R, 0x00000FC0, 6, signed=False) - self.OFSH1 = self._OFSH1(self, Access.R, 0x0003F000, 12, signed=False) - - class _ADC_CFG2(Register): - - class _OFSL2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH2", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG2", parent, access, address, block, signed) - self.OFSL2 = self._OFSL2(self, Access.R, 0x0000003F, 0, signed=False) - self.OFSM2 = self._OFSM2(self, Access.R, 0x00000FC0, 6, signed=False) - self.OFSH2 = self._OFSH2(self, Access.R, 0x0003F000, 12, signed=False) - - class _ADC_CFG3(Register): - - class _OFSL3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSL3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSM3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSM3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _OFSH3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("OFSH3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG3", parent, access, address, block, signed) - self.OFSL3 = self._OFSL3(self, Access.R, 0x0000003F, 0, signed=False) - self.OFSM3 = self._OFSM3(self, Access.R, 0x00000FC0, 6, signed=False) - self.OFSH3 = self._OFSH3(self, Access.R, 0x0003F000, 12, signed=False) - - class _ADC_CFG4(Register): - - class _SKIP_OFSH_AZ(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFSH_AZ", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_CMRN_AZ(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_CMRN_AZ", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFSL_AZ(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFSL_AZ", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _SKIP_OFSM_AZ(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("SKIP_OFSM_AZ", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CONFIG_VX2_TUNE_ADC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CONFIG_VX2_TUNE_ADC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CONFIG_VX2_TUNE_ADC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CONFIG_VX2_TUNE_ADC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CONFIG_VX2_TUNE_ADC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CONFIG_VX2_TUNE_ADC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CONFIG_VX2_TUNE_ADC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CONFIG_VX2_TUNE_ADC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG4", parent, access, address, block, signed) - self.SKIP_OFSH_AZ = self._SKIP_OFSH_AZ(self, Access.R, 0x00000001, 0, signed=False) - self.SKIP_CMRN_AZ = self._SKIP_CMRN_AZ(self, Access.R, 0x00000002, 1, signed=False) - self.SKIP_OFSL_AZ = self._SKIP_OFSL_AZ(self, Access.R, 0x00000004, 2, signed=False) - self.SKIP_OFSM_AZ = self._SKIP_OFSM_AZ(self, Access.R, 0x00000008, 3, signed=False) - self.CONFIG_VX2_TUNE_ADC0 = self._CONFIG_VX2_TUNE_ADC0(self, Access.R, 0x000003F0, 4, signed=False) - self.CONFIG_VX2_TUNE_ADC1 = self._CONFIG_VX2_TUNE_ADC1(self, Access.R, 0x0000FC00, 10, signed=False) - self.CONFIG_VX2_TUNE_ADC2 = self._CONFIG_VX2_TUNE_ADC2(self, Access.R, 0x003F0000, 16, signed=False) - self.CONFIG_VX2_TUNE_ADC3 = self._CONFIG_VX2_TUNE_ADC3(self, Access.R, 0x0FC00000, 22, signed=False) - - class _ADC_CFG5(Register): - - class _CMRN_DAC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC0(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC0", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG5", parent, access, address, block, signed) - self.CMRN_DAC0 = self._CMRN_DAC0(self, Access.R, 0x000FF000, 12, signed=False) - self.CMRP_DAC0 = self._CMRP_DAC0(self, Access.R, 0x0FF00000, 20, signed=False) - - class _ADC_CFG6(Register): - - class _CMRN_DAC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC1(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC1", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG6", parent, access, address, block, signed) - self.CMRN_DAC1 = self._CMRN_DAC1(self, Access.R, 0x000FF000, 12, signed=False) - self.CMRP_DAC1 = self._CMRP_DAC1(self, Access.R, 0x0FF00000, 20, signed=False) - - class _ADC_CFG7(Register): - - class _CMRN_DAC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC2(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC2", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG7", parent, access, address, block, signed) - self.CMRN_DAC2 = self._CMRN_DAC2(self, Access.R, 0x000FF000, 12, signed=False) - self.CMRP_DAC2 = self._CMRP_DAC2(self, Access.R, 0x0FF00000, 20, signed=False) - - class _ADC_CFG8(Register): - - class _CMRN_DAC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRN_DAC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - class _CMRP_DAC3(Field): - - def __init__(self, parent, access, mask, shift, signed): - super().__init__("CMRP_DAC3", parent, access, mask, shift, signed=signed) - - self.choice = None - - def __init__(self, parent, access, address, block, signed): - super().__init__("ADC_CFG8", parent, access, address, block, signed) - self.CMRN_DAC3 = self._CMRN_DAC3(self, Access.R, 0x000FF000, 12, signed=False) - self.CMRP_DAC3 = self._CMRP_DAC3(self, Access.R, 0x0FF00000, 20, signed=False) - def __init__(self, block=None): super().__init__("ALL_REGISTERS", block) - self.SW_RESET = self._SW_RESET(self, Access.RW, 0x0000, block, False) - self.SW_RESET_STATUS = self._SW_RESET_STATUS(self, Access.RWC, 0x0001, block, False) - self.PMU_CTRL = self._PMU_CTRL(self, Access.RW, 0x0004, block, False) - self.FAULT_STS = self._FAULT_STS(self, Access.R, 0x0008, block, False) - self.FAULT_R_INT = self._FAULT_R_INT(self, Access.RWC, 0x0009, block, False) - self.FAULT_R_ENA_F = self._FAULT_R_ENA_F(self, Access.RW, 0x000A, block, False) - self.FAULT_R_ENA_I = self._FAULT_R_ENA_I(self, Access.RW, 0x000B, block, False) - self.FAULT_F_INT = self._FAULT_F_INT(self, Access.RWC, 0x000C, block, False) - self.FAULT_F_ENA_F = self._FAULT_F_ENA_F(self, Access.RW, 0x000D, block, False) - self.FAULT_F_ENA_I = self._FAULT_F_ENA_I(self, Access.RW, 0x000E, block, False) - self.FREQ_TRIM_VAON = self._FREQ_TRIM_VAON(self, Access.R, 0x0010, block, False) - self.IZTAT_TRIM_VAON = self._IZTAT_TRIM_VAON(self, Access.R, 0x0011, block, False) - self.SW_LVL_OTP = self._SW_LVL_OTP(self, Access.R, 0x0012, block, False) - self.READBACK_OTP = self._READBACK_OTP(self, Access.RWC, 0x0013, block, False) - self.ADC_CFG0 = self._ADC_CFG0(self, Access.R, 0x0014, block, False) - self.ADC_CFG1 = self._ADC_CFG1(self, Access.R, 0x0015, block, False) - self.ADC_CFG2 = self._ADC_CFG2(self, Access.R, 0x0016, block, False) - self.ADC_CFG3 = self._ADC_CFG3(self, Access.R, 0x0017, block, False) - self.ADC_CFG4 = self._ADC_CFG4(self, Access.R, 0x0018, block, False) - self.ADC_CFG5 = self._ADC_CFG5(self, Access.R, 0x0019, block, False) - self.ADC_CFG6 = self._ADC_CFG6(self, Access.R, 0x001A, block, False) - self.ADC_CFG7 = self._ADC_CFG7(self, Access.R, 0x001B, block, False) - self.ADC_CFG8 = self._ADC_CFG8(self, Access.R, 0x001C, block, False) - + self.FAULT_STS = self._FAULT_STS( self, Access.R, 0x0008, block, False) + self.FAULT_R_INT = self._FAULT_R_INT( self, Access.RWC, 0x0009, block, False) + self.FAULT_R_ENA_F = self._FAULT_R_ENA_F(self, Access.RW, 0x000A, block, False) + self.FAULT_F_INT = self._FAULT_F_INT( self, Access.RWC, 0x000C, block, False) + self.FAULT_F_ENA_F = self._FAULT_F_ENA_F(self, Access.RW, 0x000D, block, False)