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For Loop info
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Alain Dargelas committed Nov 21, 2024
1 parent 323fe6e commit a42cbf3
Showing 1 changed file with 16 additions and 16 deletions.
32 changes: 16 additions & 16 deletions frontends/verific/decorate_loops.h
Original file line number Diff line number Diff line change
Expand Up @@ -21,10 +21,10 @@
This Visitor decorates the AST with a loop ID attribute for all outer for loops.
All AST nodes contained within the subtree of an outer for-loop
have the same ID carried as an additional payload of the "linefile" struct.
The ID is unique accross the flat RTL module set, as it is computed before elaboration.
The ID is unique accross the flat RTL module set, as it is computed before elaboration.
It is not unique per instance of the modules.
A further separation of cells belonging to a given loop instance is necessary by means of
connectivity analysis.
A further separation of cells belonging to a given loop instance is necessary by means of
connectivity analysis.
No "loop instance" information seems to exist to cluster those loops elements together unfortunately.
*/
class DecorateLoopsVisitor : public VeriVisitor
Expand All @@ -34,37 +34,37 @@ class DecorateLoopsVisitor : public VeriVisitor
~DecorateLoopsVisitor() {};
virtual void VERI_VISIT(VeriLoop, node)
{
//std::cout << "Loop in: " << (VeriLoop *)&node << " id: " << outerLoopId << std::endl;
// std::cout << "Loop in: " << (VeriLoop *)&node << " id: " << outerLoopId << std::endl;
if (loopStack.empty()) {
// We increase the loop count when we enter a new set of imbricated loops,
// That way we have a loop index for the outermost loop as we want to identify and group
// logic generated by imbricated loops
// We increase the loop count when we enter a new set of imbricated loops,
// That way we have a loop index for the outermost loop as we want to identify and group
// logic generated by imbricated loops
outerLoopId++;
}
loopStack.push((VeriLoop *)&node);
}

void PreAction(VeriTreeNode &/*node*/)
void PreAction(VeriTreeNode & /*node*/)
{
//VeriNode *vnode = dynamic_cast<VeriNode *>(&node);
//std::cout << "Node pre: " << vnode << std::endl;
// VeriNode *vnode = dynamic_cast<VeriNode *>(&node);
// std::cout << "Node pre: " << vnode << std::endl;
}

virtual void PostAction(VeriTreeNode &node)
{
//std::cout << "Node post: " << (VeriTreeNode *)&node << std::endl;
// std::cout << "Node post: " << (VeriTreeNode *)&node << std::endl;
if (loopStack.size()) {
if (loopStack.top() == (VeriLoop *)&node) {
loopStack.pop();
std::cout << "Loop out: " << (VeriFor *)&node << std::endl;
return;
}
Verific::linefile_type linefile = (Verific::linefile_type)node.Linefile();
// Unfortunately there is no good way to systematically copy certain AST attributes to the Netlist attributes like:
//VeriNode *vnode = dynamic_cast<VeriNode *>(&node);
//vnode->AddAttribute(" in_loop", new VeriIntVal(outerLoopId));
// Instead using linefile struct to pass that information:
if (linefile)
// Unfortunately there is no good way to systematically copy certain AST attributes to the Netlist attributes like:
// VeriNode *vnode = dynamic_cast<VeriNode *>(&node);
// vnode->AddAttribute(" in_loop", new VeriIntVal(outerLoopId));
// Instead using linefile struct to pass that information:
if (linefile)
linefile->SetInLoop(outerLoopId);
}
}
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