From: 14 May 2024 - To: 02 February 2025
Total Time: 265 hrs 43 mins
Rust 95 hrs 13 mins >>>>>>>>>---------------- 35.41 %
C 35 hrs 55 mins >>>---------------------- 13.36 %
Go 30 hrs 7 mins >>>---------------------- 11.20 %
Python 28 hrs 40 mins >>>---------------------- 10.67 %
C++ 25 hrs 27 mins >>----------------------- 09.47 %
Makefile 6 hrs 53 mins >------------------------ 02.56 %
SystemVerilog 6 hrs 27 mins >------------------------ 02.40 %
Text 6 hrs 20 mins >------------------------ 02.36 %
HTML 4 hrs 41 mins ------------------------- 01.74 %
PHP 4 hrs 30 mins ------------------------- 01.68 %
🌴
On Something
Student of Computer Engineering at Cin-UFPE - Recife, PE
-
Cin - UFPE
- Pernambuco, Brazil
-
12:56
(UTC -03:00) - cin.ufpe.br/~lgpss
- @luizgust132
- https://lattes.cnpq.br/3310202128635156
- in/luiz-gustavo-a545b8317
- https://rxresu.me/zed201/infos
Highlights
- Pro
Pinned Loading
-
Projeto_IH_RISC-V
Projeto_IH_RISC-V PublicForked from nathaliafab/Projeto_IH_RISC-V
Arquivos base para o projeto da disciplina Infraestrutura de Hardware (IF674) no CIn-UFPE.
SystemVerilog
-
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.