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1. SJTUReport SJTUReport Public

   上海交通大学 Latex 课程报告模板

   TeX 2

2. StateMerger StateMerger Public

   A Python script with tutorial that automates the process of merging states in Victoria 3.

   Python 1

3. StateMerging StateMerging Public

   A Victoria 3 Mod that merges small states into proper-sized states.

4. VerilogA_Lib VerilogA_Lib Public

   Library of Verilog-A models

5. RISCV_CPU RISCV_CPU Public

   Term project of MST3305-01, SJTU, 2024 spring.

   Verilog 1

6. Vivado_embedded_Zybo Vivado_embedded_Zybo Public archive

   SJTU MST4311 课程作业：基于Zybo实现的简单嵌入式系统。使用双通道GPIO和中断实现跑马灯和按键中断。

   VHDL