Add support of HASH peripheral for stm32mp1 #7259
Conversation
Add HASH IP drivers, and add hooks in OP-TEE crypto framework to use HASH IP to do HASH and HMAC process Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Sets HASH peripheral status to okay. Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Default enable HASH compilation. Enable CFG_STM32_CRYPTO_DRIVERS if any crypto IP is compiled. Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
hash.c & hmac.c: - Initial variables with errors where possible, - Remove dynamic allocation in do_hmac_final() and do_hash_final() stm32_hash.c: - Fix documentation - Remove unnecessary "U" - Add space before } - Remove unnecessary parenthesis Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
| #define _HASH_CR_INIT BIT(2) | ||
| #define _HASH_CR_MODE BIT(6) | ||
| #define _HASH_CR_DATATYPE_SHIFT U(4) | ||
| #define _HASH_CR_DATATYPE_NONE (U(0) << _HASH_CR_DATATYPE_SHIFT) |
There was a problem hiding this comment.
prefer SHIFT_U32() for all these.
| { | ||
| uint64_t timeout = timeout_init_us(HASH_TIMEOUT_US); | ||
|
|
||
| while (io_read32(base + _HASH_SR) & _HASH_SR_BUSY) |
There was a problem hiding this comment.
prefer IO_READ32_POLL_TIMEOUT()
Ditto in wait_digest_ready()
| size_t *first, size_t *hmac_nb_regs, | ||
| size_t *hmac_first) | ||
| { | ||
| if (c->save_mode == SAVE_SMALL) { |
There was a problem hiding this comment.
prefer a swich/case implemenation
|
|
||
| dst_buf = dst->remain.buf; | ||
| dst_csr = dst->csr; | ||
| memcpy(dst, src, sizeof(*dst)); |
There was a problem hiding this comment.
prefer *dst = *src; when copying data of same type.
| c->block_size = SHA3_512_BLOCK_SIZE; | ||
| c->save_mode = SAVE_SHA3; | ||
| break; | ||
| /* Default selected algo is SHA256 */ |
There was a problem hiding this comment.
This seems strange here. I think you can remove this inline comment and move the case between SHA224 and SAH384 cases.
| !(io_read32(base + _HASH_SR) & _HASH_SR_DINIS)) { | ||
| uint32_t tmp_buf = 0; | ||
|
|
||
| memcpy(&tmp_buf, buffer, sizeof(uint32_t)); |
There was a problem hiding this comment.
should sizeof(uint32_t) be replaced with MIN(len ,sizeof(uint32_t)).
Or maybe it is the || test at line 661 that should be a &&.
I must say that the first sentence in inline comment at line 653 is a bit cryptic to me.
| goto exit; | ||
| } | ||
|
|
||
| memcpy((uint8_t *)c->remain.buf, buffer, len); |
|
|
||
| /* We cannot fill the fifo */ | ||
| if (c->remain.len + len < c->queue_size) { | ||
| if (!c->remain.buf) { |
There was a problem hiding this comment.
I think this cannot happen. Ditto at line 723.
| } | ||
|
|
||
| io_clrsetbits32(base + _HASH_STR, _HASH_STR_NBLW_MASK, | ||
| 8U * (c->remain.len % sizeof(uint32_t))); |
| if (IS_ENABLED(CFG_CRYPTO_DRV_MAC)) { | ||
| res = stm32_register_hmac(); | ||
| if (res) { | ||
| EMSG("Failed to register to mac: %#"PRIx32, res); |
Add support of HASH peripheral for stm32mp15 and stm32mp13.
This PR :
Note:
HASH peripheral is allocated to non-secure on stm32mp15 boards , that's why it's not enable it in this PR.