Pasha.gr3 - more development

CMakeLists.txt

@@ -29,6 +29,23 @@ find_package(artdaq_core_demo  1.11.00 REQUIRED EXPORT)
 find_package(otsdaq_mu2e       1.02.00 REQUIRED EXPORT)
 find_package(mu2e_pcie_utils   3.02.00 REQUIRED EXPORT)
 
+message("-- P.Murat: otsdaq-mu2e-tracker: MIDASSYS=."$ENV{MIDASSYS})
+
+# message("---------- otsdaq-mu2e-tracker: PRINT CMAKE VARIABLES " )
+# 
+# get_cmake_property(_variableNames VARIABLES)
+# list (SORT _variableNames)
+# foreach (_variableName ${_variableNames})
+#   message(STATUS "${_variableName}=${${_variableName}}")
+# endforeach()
+
+# if (DEFINED ENV{MIDASSYS})
+#    message(-- P.Murat: otsdaq-mu2e-tracker: MIDASSYS=.$ENV{MIDASSYS}. )
+#    find_package(Midas REQUIRED)
+# else()
+#    message("-- P.Murat: no MIDASSYS")
+# endif()
+
 # XDAQ Extra setup
 include_directories($ENV{XDAQ_ROOT}/include)
 

config/pasha/mu2edaq07_pcie0.C

@@ -0,0 +1,37 @@
+///////////////////////////////////////////////////////////////////////////////
+// mu2edaq22 : DTC0: ROC tower
+// init_run_configuration : the name and the call signature are is fixed 
+//                          and can't be changed
+///////////////////////////////////////////////////////////////////////////////
+#include "otsdaq-mu2e-tracker/Gui/DtcGui.hh"
+int init_run_configuration(DtcGui* X) {
+  int rc(0);
+
+  printf("[init_run_configuration] : host:%s\n",gSystem->Getenv("HOSTNAME"));
+
+  DtcGui::DtcData_t* dtc = (DtcGui::DtcData_t*) X->fDtcData;
+
+  X->fNDtcs           = 1; // 2;              // installed on a machine
+
+  // dtc[0].fName        = "CFO";
+  // dtc[0].fPcieAddr    = 0;
+  // dtc[0].fLinkMask    = 0x2;            // 2 DTCs on link0
+  // gSystem->Setenv("CFOLIB_CFO","0");
+
+  dtc[0].fName        = "DTC";
+  dtc[0].fPcieAddr    = 0;
+  // dtc[0].fLinkMask    = 0x000001;        // ROC0
+  dtc[0].fLinkMask    = 0x111111;           // 6 ROCs
+  dtc[0].fReadoutMode = 0;               // 0:patterns 1:digis
+  dtc[0].fJAMode      = 0x01;            // ROC tower@IERC: external clock (internal_clock << 4) + reset
+  dtc[0].fEmulateCfo  = 1;               // 
+
+  dtc[0].fDtcID       = 7;              // for one machine, make it the same as the PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
+  gSystem->Setenv("DTCLIB_DTC","0");
+
+  return rc;
+}

config/pasha/mu2edaq07_pcie1.C

@@ -0,0 +1,35 @@
+///////////////////////////////////////////////////////////////////////////////
+// mu2edaq22 : 
+// init_run_configuration : the name and the call signature are is fixed 
+//                          and can't be changed
+///////////////////////////////////////////////////////////////////////////////
+#include "otsdaq-mu2e-tracker/Gui/DtcGui.hh"
+int init_run_configuration(DtcGui* X) {
+  int rc(0);
+
+  printf("[init_run_configuration] : host:%s\n",gSystem->Getenv("HOSTNAME"));
+
+  DtcGui::DtcData_t* dtc = (DtcGui::DtcData_t*) X->fDtcData;
+
+  X->fNDtcs           = 1; // 2;              // installed on a machine
+
+  // dtc[0].fName        = "CFO";
+  // dtc[0].fPcieAddr    = 0;
+  // dtc[0].fLinkMask    = 0x2;            // 2 DTCs on link0
+  // gSystem->Setenv("CFOLIB_CFO","0");
+
+  dtc[0].fName        = "DTC";
+  dtc[0].fPcieAddr    = 1;
+  dtc[0].fLinkMask    = 0x011;           // TS2 (0x10) +TS1
+  dtc[0].fJAMode      = 0x01;
+  dtc[0].fReadoutMode = 1;               // 0:patterns 1:digis
+
+  dtc[0].fDtcID       = 1;               // for 1 node, make it the same as PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
+  gSystem->Setenv("DTCLIB_DTC","1");
+
+  return rc;
+}

config/pasha/mu2edaq09_pcie0.C

@@ -1,5 +1,5 @@
 ///////////////////////////////////////////////////////////////////////////////
-// mu2edaq09 : 
+// mu2edaq09/pcie0 : 
 // init_run_configuration : the name and the call signature are is fixed 
 //                          and can't be changed
 ///////////////////////////////////////////////////////////////////////////////
@@ -15,8 +15,18 @@ int init_run_configuration(DtcGui* X) {
 
   dtc[0].fName        = "DTC" ; // "CFO";
   dtc[0].fPcieAddr    = 0;
-  dtc[0].fLinkMask    = 0x1;            // start from 2 DTCs on link0
+  dtc[0].fLinkMask    = 0x111111;           // start from 2 DTCs on link0
+  // dtc[0].fLinkMask    = 0x0010;           // MN180
+  // dtc[0].fLinkMask    = 0x1000;           // MN162
+  // dtc[0].fLinkMask    = 0x1001;           // MN234+MN162
+  dtc[0].fJAMode      = 0x01;           // no ext clock 
   //gSystem->Setenv("CFOLIB_CFO","0");
+
+  dtc[0].fDtcID       = 0;              // for one machine, make it the same as the PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
   gSystem->Setenv("DTCLIB_DTC","0");
 
   // dtc[0].fName        = "DTC";

config/pasha/mu2edaq09_pcie1.C

@@ -1,5 +1,5 @@
 ///////////////////////////////////////////////////////////////////////////////
-// mu2edaq09 : 
+// mu2edaq09/pcie1 : 
 // init_run_configuration : the name and the call signature are is fixed 
 //                          and can't be changed
 ///////////////////////////////////////////////////////////////////////////////
@@ -13,17 +13,25 @@ int init_run_configuration(DtcGui* X) {
 
   X->fNDtcs           = 1; // 2;              // installed on a machine
 
-  // dtc[0].fName        = "CFO";
-  // dtc[0].fPcieAddr    = 0;
-  // dtc[0].fLinkMask    = 0x2;            // 2 DTCs on link0
-  // gSystem->Setenv("CFOLIB_CFO","0");
-
-  dtc[0].fName        = "DTC";
+  dtc[0].fName        = "DTC" ; // "CFO";
   dtc[0].fPcieAddr    = 1;
-  // dtc[0].fLinkMask    = 0x00111111;          // ROC tower: all ROCs
-  dtc[0].fLinkMask    = 0x111;  
-  dtc[0].fReadoutMode = 1;               // 0:patterns 1:digis
+  // dtc[0].fLinkMask    = 0x11111;           // start from 2 DTCs on link0
+  // dtc[0].fLinkMask    = 0x11111;           // can read 3 ROCs
+  dtc[0].fLinkMask    = 0x111111 ;           // leave only 2, 
+  dtc[0].fJAMode      = 0x01;           // no ext clock 
+  //gSystem->Setenv("CFOLIB_CFO","0");
+
+  dtc[0].fDtcID       = 1;              // for one machine, make it the same as the PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
   gSystem->Setenv("DTCLIB_DTC","1");
 
+  // dtc[0].fName        = "DTC";
+  // dtc[0].fPcieAddr    = 1;
+  // dtc[0].fLinkMask    = 0x111;           // ROC0 and ROC1
+  // gSystem->Setenv("DTCLIB_DTC","1");
+
   return rc;
 }

config/pasha/mu2edaq22_pcie0.C

@@ -1,5 +1,5 @@
 ///////////////////////////////////////////////////////////////////////////////
-// mu2edaq22 : 
+// mu2edaq22 : DTC0: ROC tower
 // init_run_configuration : the name and the call signature are is fixed 
 //                          and can't be changed
 ///////////////////////////////////////////////////////////////////////////////
@@ -20,8 +20,17 @@ int init_run_configuration(DtcGui* X) {
 
   dtc[0].fName        = "DTC";
   dtc[0].fPcieAddr    = 0;
-  dtc[0].fLinkMask    = 0x1;             // ROC0
+  // dtc[0].fLinkMask    = 0x000001;        // ROC0
+  dtc[0].fLinkMask    = 0x111111;           // 6 ROCs
   dtc[0].fReadoutMode = 0;               // 0:patterns 1:digis
+  dtc[0].fJAMode      = 0x01;            // ROC tower@IERC: external clock (internal_clock << 4) + reset
+  dtc[0].fEmulateCfo  = 1;               // 
+
+  dtc[0].fDtcID       = 7;              // for one machine, make it the same as the PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
   gSystem->Setenv("DTCLIB_DTC","0");
 
   return rc;

config/pasha/mu2edaq22_pcie1.C

@@ -20,10 +20,16 @@ int init_run_configuration(DtcGui* X) {
 
   dtc[0].fName        = "DTC";
   dtc[0].fPcieAddr    = 1;
-  //  dtc[0].fLinkMask    = 0x111111;           // full ROC tower
-  dtc[0].fLinkMask    = 0x1;           // ROC0
-  // dtc[0].fLinkMask    = 0x00011;            // ROC0 and 1 : ROC tower, draq3 and draq5
+  dtc[0].fLinkMask    = 0x011;           // TS2 (0x10) +TS1
+  //  dtc[0].fLinkMask    = 0x01;           // TS1
+  dtc[0].fJAMode      = 0x01;
   dtc[0].fReadoutMode = 1;               // 0:patterns 1:digis
+
+  dtc[0].fDtcID       = 1;               // for 1 node, make it the same as PcieAddr
+  dtc[0].fPartitionID = 0;
+  dtc[0].fMode        = 0;
+  dtc[0].fMacAddrByte = 0;
+
   gSystem->Setenv("DTCLIB_DTC","1");
 
   return rc;

doc/control_roc.org

@@ -48,9 +48,19 @@ readDeviceID
  - read -a 0 -t 3 -s 1 -l 8 -T 10 -m 3 -p 0 -C 0 -D 0 -E 08000000 : enable channel 91
 
    -a mode : output test mode
-| mode | pattern name | digital output word |
-|------+--------------+---------------------|
-|      |              |                     |
+| mode | pattern name      | digital output word 1   | digital output word2    |
+|------+-------------------+-------------------------+-------------------------|
+| 0000 | off               | default                 | none                    |
+| 0001 | midscale short    | 1000 0000 0000 (12 bit) | none                    |
+|      |                   | 10 0000 0000 (10 bit)   | none                    |
+| 0010 | +full-scale short | 1111 1111 1111 (12 bit) |                         |
+|      |                   | 11 1111 1111 (10 bit)   | none                    |
+| 0011 | -full-scale short | 0000 0000 0000 (12 bit) | none                    |
+|      |                   | 00 0000 0000 (10 bit)   |                         |
+| 0100 | checkerboard      | 1010 1010 1010 (12 bit) | 0101 0101 0101 (12 bit) |
+|      |                   | 10 1010 1010 (10 bit)   | 01 0101 0101 (10 bit)   |
+|      |                   |                         |                         |
+Vadim's cheatsheet: file:images/vadim_digi_pattern_codes.png
 
     -m 3   : mode  ... need -m 3 for internal pulser 
     -l 8   : defines the look-back number of ADC samples for the waveform readout (may want to set to 0) 
@@ -305,13 +315,10 @@ Loading settings ...
 =======================================================
 Ending...
 #+end_src
-
-- or , if thresholds need to be adjusted: 
-
+** 2.5) update and save thresholds                                      
 #+begin_src
 python3 diagnostic.py -m V -tv 30 -f settings_pasha_002.dat -p /dev/ttyUSB0
 #+end_src
-
 ** 3) login back to control_ROC, measure thresholds, set pulser              
 #+begin_src 
 python3 control_ROC.py --ts 1
@@ -371,7 +378,7 @@ set_digi_rw -s 0
 #+end_src
 * 1) after each DIGIs power up, run control_ROC.py on trackerpi1/trackerpi5  
 1. start control_ROC.py on the PI
-   1.a : let serial drives commands to DIGI
+   1.a : let serial drive commands to DIGI
    1.b : do alignment, what is alignment ?
    1.c : read smth, why ?
    1.d : in the end, let fiber drive commands to DIGI

doc/otsdaq_mu2e_tracker.org

@@ -165,6 +165,18 @@ And that no TIMEOUT should be observed on the very first event after a DTC_Reset
 * [[file:./dtc_gui.org][DtcGui interface]]
 * LVHVBox : https://github.com/vlrusu/LVHVBox                                
 - local repo: file:~mu2etrk/products/LVHVBox
+- client commands:                                                           
+  - powerOn 3
+  - powerOff
+#+begin_src readMonV48                                                       
+readMonV48
+Channel 0 47.64 V
+Channel 1 47.96 V
+Channel 2 47.88 V
+Channel 3 0.62 V
+Channel 4 0.62 V
+Channel 5 0.61 V
+#+end_src
 * slow control of DTCs                                                       
 ** DTC_0 FPGA:  4 parameters                                                 
   -- 0x9010 : temperature
@@ -468,7 +480,7 @@ readDeviceID
 ('DRAC ROC ID #', '7a7fb')
 ** [[file:roc_id_1b561.org][ROC ID 1b561]] : <2024-05-09 Thu> installed at TS1               
 ** [[file:roc_id_805d6.org][ROC ID 805d6]] : <2024-02-25 Sun> installed at TS2
-* DRAC Tower6                                                                
+* ROC Tower                                                                
 - new PI ...  mu2e@ ... (local)
 ** window 1: cd ~/LVHVBox/GServer/build
               sudo ~/Server
@@ -477,7 +489,7 @@ readDeviceID
               python3 Client.py
 ** Commands:                                                                 
  - powerOn  1       # [or 2 or 3 ... 0=all)
- - powerOff 1       # same semantics
+ - powerOff         # same semantics
  - readMonI6 .. readMonI48 .. readMonV6 .. readMonV48
 * test stands TS0, TS1, TS2                                                  
 ** last update <2024-07-15 Mon>

fcl/test_dqm_client01_input_file.fcl

@@ -178,7 +178,7 @@ physics: {
 # new format: offset 0x20 : 40  (80 bytes = (0x20 + 0x08) in 2-byte words)
 # currently redefined in beginRun
 #------------------------------------------------------------------------------
-            dataHeaderOffset    : 32
+            dataHeaderOffset    : 24
             dumpDTCRegisters    :  0
 #------------------------------------------------------------------------------
 # reference channel to calculate dt(i) = T(0,i)-T(0,referenceChannel)

otsdaq-mu2e-tracker/ArtModules/TrackerDQM_module.cc

@@ -209,7 +209,8 @@ void TrackerDQM::book_channel_histograms(art::TFileDirectory* Dir, int RunNumber
 // waveform histograms, assume number of samples < 30
 //-----------------------------------------------------------------------------
   for (int j=0; j<kMaxNHitsPerChannel; j++) {
-    Hist->wf[j] = Dir->make<TH1F>(Form("h_wf_ch_%02i_%i",I,j),Form("run %06i: ch [%02i][%i] waveform",RunNumber,I,j),30, 0.,30.);
+    Hist->wf    [j] = Dir->make<TH1F>(Form("h_wf_ch_%02i_%i",I,j)    ,Form("run %06i: ch [%02i][%i] waveform"    ,RunNumber,I,j),30, 0.,30.);
+    Hist->raw_wf[j] = Dir->make<TH1F>(Form("h_raw_wf_ch_%02i_%i",I,j),Form("run %06i: ch [%02i][%i] raw waveform",RunNumber,I,j),30, 0.,30.);
   }
 }
 
@@ -410,7 +411,9 @@ void TrackerDQM::unpack_adc_waveform(mu2e::TrackerDataDecoder::TrackerDataPacket
     Wf[ 2] = reverseBits(Hit->ADC02);
 
     for (int i=0; i<n_adc_packets; i++) {
-      mu2e::TrackerDataDecoder::TrackerADCPacket* ahit = (mu2e::TrackerDataDecoder::TrackerADCPacket*) (((uint16_t*) Hit)+6+8*i);
+// first packet contains times, TOTs etc, two last words - ARC samples
+// second and other packets - all ADC samples
+      mu2e::TrackerDataDecoder::TrackerADCPacket* ahit = (mu2e::TrackerDataDecoder::TrackerADCPacket*) (((uint16_t*) Hit)+8+8*i);
       int loc = 12*i+2;
 
       Wf[loc+ 1] = reverseBits(ahit->ADC0);
@@ -421,8 +424,8 @@ void TrackerDQM::unpack_adc_waveform(mu2e::TrackerDataDecoder::TrackerDataPacket
       Wf[loc+ 6] = reverseBits(ahit->ADC5);
       Wf[loc+ 7] = reverseBits(ahit->ADC6);
       Wf[loc+ 8] = reverseBits(ahit->ADC7A + (ahit->ADC7B << 6));
-      Wf[loc+ 9] = reverseBits(ahit->ADC5);
-      Wf[loc+10] = reverseBits(ahit->ADC6);
+      Wf[loc+ 9] = reverseBits(ahit->ADC8);
+      Wf[loc+10] = reverseBits(ahit->ADC9);
       Wf[loc+11] = reverseBits(ahit->ADC10A + (ahit->ADC10B << 6));
       Wf[loc+12] = reverseBits(ahit->ADC11);
     }
@@ -566,12 +569,15 @@ void TrackerDQM::unpack_adc_waveform(mu2e::TrackerDataDecoder::TrackerDataPacket
           hch->wf[ih]->Reset();
           for (int is=0; is<nsamples; is++) {
             hch->wf[ih]->Fill(is,wform[is]);
+            hch->raw_wf[ih]->Fill(is,wform[is]+wpar->bl);
           }
                                         // also set bin errors to zero
           int nb =  hch->wf[ih]->GetNbinsX();
           for (int ib=0; ib<nb; ib++) {
             hch->wf[ih]->SetBinError(ib+1,0);
             hch->wf[ih]->SetOption("HIST");
+            hch->raw_wf[ih]->SetBinError(ib+1,0);
+            hch->raw_wf[ih]->SetOption("HIST");
           }
 //-----------------------------------------------------------------------------
 // reconstructed waveform parameters

otsdaq-mu2e-tracker/ArtModules/TrackerDQM_module.hh

@@ -62,7 +62,7 @@ class TrackerDQM : public art::EDAnalyzer {
     kNPanelsPerPlane    =  6,
     kNChannels          = 96,
     kMaxNLinks          =  6,
-    kMaxNHitsPerChannel = 15,
+    kMaxNHitsPerChannel = 10,
     kMaxNSamples        = 30
   };
 
@@ -100,7 +100,8 @@ class TrackerDQM : public art::EDAnalyzer {
     TH1F*         qt;                 // tail charge Qt
     TH1F*         qtq;                // Qt/Q
 
-    TH1F*         wf[kMaxNHitsPerChannel];
+    TH1F*         wf    [kMaxNHitsPerChannel];
+    TH1F*         raw_wf[kMaxNHitsPerChannel];
   };
 
 //-----------------------------------------------------------------------------