This code example demonstrates the generation of asymmetric PWM signals using two compare/capture registers available in the Timer, Counter and PWM (TCPWM) block.
The device used in this code example (CE) is:
The board used for testing is:
- TRAVEO™ T2G Cluster 6M Lite Kit (KIT_T2G_C-2D-6M_LITE)
Compared to the asymmetric PWM realized with only one compare function (where the CPU is used to update the compare value twice every PWM cycle), this solution uses two independent buffered compare values and causes less load on the CPU (where the CPU is used to update the compare value once every PWM cycle). PWM waveform can be modified through the command on the terminal.
TCPWM
TRAVEO™ T2G platform supports the following TCPWM features:
- Supports up to four counter groups (device specific)
- Each counter group consists up to 256 counters (counter group specific)
- Each counter can run in one of seven function modes:
- Timer-counter with compare
- Timer-counter with capture
- Quadrature decoding
- Pulse width modulation/stepper motor control (SMC) for pointer instruments
- PWM with dead time/three-phase motor control (Brushless-DC, BLDC)
- Pseudo-random PWM
- Shift register mode
- 16-bit or 32-bit counters (counter group specific)
- Up, down, and up/down counting modes
- Clock prescaling (division by 1, 2, 4, ... 64, 128)
- Up to two capture and compare functions (counter group specific)
- Double buffering of all compare/capture and period registers
- Two output trigger signals for each counter to indicate underflow, overflow, and capture/compare events; they can also directly be connected with the line output signal
- Supports interrupt on:
- Terminal Count - Depends on the mode; typically occurs on overflow or underflow
- Capture/Compare - The count is captured in the capture registers or the counter value equals the value in the compare register
- Line out selection feature for stepper motor application including two complementary output lines with dead time insertion
- Selectable start, reload, stop, count, and two capture event signals for each TCPWM with rising edge, falling edge, both edges, and level trigger options
- Each counter with up to 254 (device specific) synchronized input trigger signals and two constant input signals: '0' and '1'.
- Two types of input triggers for each counter:
- General-purpose triggers used by all counters
- One-to-one triggers for specific counter
- Synchronous operation of multiple counters
- Debug mode support
More details can be found in:
- TRAVEO™ T2G CYT4DN
This CE has been developed for:
- TRAVEO™ T2G Cluster 6M Lite Kit (KIT_T2G_C-2D-6M_LITE)
Figure 1. KIT_T2G_C-2D-6M_LITE (Top View)
This CE uses following pins to monitor the behavior:
- PWM_VARIABLE - PWM output for modifying waveform (P9[2])
- PWM_FIXED - PWM output for reference (P9[4])
The actual pin name can be referred in design.modus file.
This code example demonstrates generating asymmetric PWM signals using dual compare/capture, which have been configured in the Device Configurator. In this example, two channels of the TCPWM is configured. One is for that the duty cycle and alignment of PWM can be adjusted via terminal software (e.g. Tera Term) connected to KitProg3 port. Another is for show the original wave form as a reference. These TCPWMs are started simultaneously by software via the Trigger Multiplexer.
STDIN / STDOUT setting
Initialization of the GPIO for UART is done in the cy_retarget_io_init() function.
- Initialize the pin specified by CYBSP_DEBUG_UART_TX as UART TX, the pin specified by CYBSP_DEBUG_UART_RX as UART RX (these pins are connected to KitProg3 COM port)
- The serial port parameters become to 8N1 and 115200 baud
Cy_SCB_UART_Get() returns the user input from the terminal as received data. When the command is received through the terminal, it reflects to PWM waveform by process_Key_Press().
Initialize and enable the TCPWM
Initialization of the TCPWM is done once in the Cy_TCPWM_PWM_Init() function, then enables the TCPWM in the Cy_TCPWM_PWM_Enable() function
- Default: center-aligned square wave with a 50% duty cycle is generated on the specified pin
- The default value is read from TCPWM registers into variables by PDL functions (Cy_TCPWM_PWM_GetPeriod0(), Cy_TCPWM_PWM_GetCompare1Val(), Cy_TCPWM_PWM_GetCompare0Val())
The interrupt handler for the PWM Terminal Count event is prepared as handle_TCPWM_Interrupt() and is registered by Cy_SysInt_Init(), and the interrupt is enabled by NVIC_EnableIRQ()
Start the PWM
Starts the TCPWM in the Cy_TCPWM_TriggerStart_Single() function
Changing duty / alignment of the PWM
In process_key_press() function, duty and alignment is changed by PDL functions(Cy_TCPWM_PWM_SetCompare0BufVal(), Cy_TCPWM_PWM_SetCompare1BufVal(), Cy_TCPWM_TriggerCaptureOrSwap_Single())
Using device configurator
The configuration required for the TCPWM block is done in a custom design.modus file. This can be opened by Device Configurator, also can be modified. If saved, all settings will be reflected to codes.
For this example, a terminal emulator is required for displaying outputs. Install a terminal emulator if you do not have one. Instructions in this document use Tera Term.
After code compilation, perform the following steps to flashing the device:
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Connect the board to your PC using the provided USB cable through the KitProg3 USB connector.
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Open a terminal program and select the KitProg3 COM port. Set the serial port parameters to 8N1 and 115200 baud.
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Program the board using one of the following:
- Select the code example project in the Project Explorer.
- In the Quick Panel, scroll down, and click [Project Name] Program (KitProg3_MiniProg4).
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After programming, the code example starts automatically. Confirm that the messages are displayed on the UART terminal.
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You can debug the example to step through the code. In the IDE, use the [Project Name] Debug (KitProg3_MiniProg4) configuration in the Quick Panel. For details, see the "Program and debug" section in the Eclipse IDE for ModusToolbox™ software user guide.
Note: (Only while debugging) On the CM7 CPU, some code in main() may execute before the debugger halts at the beginning of main(). This means that some code executes twice: once before the debugger stops execution, and again after the debugger resets the program counter to the beginning of main(). See KBA231071 to learn about this and for the workaround.
Relevant Application notes are:
- AN235305 - Getting started with TRAVEO™ T2G family MCUs in ModusToolbox™
- AN220224 - How to use Timer, Counter, and PWM (TCPWM) in TRAVEO™ T2G family
ModusToolbox™ is available online:
Associated TRAVEO™ T2G MCUs can be found on:
More code examples can be found on the GIT repository:
For additional trainings, visit our webpage:
For questions and support, use the TRAVEO™ T2G Forum: