OnePulse.v

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// --------------------------------------------------------------------
// Module:OnePulse
// 
// Author: george
// 
// Description: 
// 
// 
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// Code Revision History :
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// Version: |Mod. Date:   |Changes Made:
// V1.0     |2021/01/11   |Initial ver
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///////////////////////////////sample code : onepulse
module OnePulse (
	output reg signal_single_pulse,
	input wire signal,
	input wire clock
	);
	
	reg signal_delay;

	always @(posedge clock) begin
		if (signal == 1'b1 & signal_delay == 1'b0)
		  signal_single_pulse <= 1'b1;
		else
		  signal_single_pulse <= 1'b0;

		signal_delay <= signal;
	end
endmodule
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